SIMulation Workbench Documentation SIMulation Workbench Documentation

simrtdb.h File Reference

#include <sched.h>
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Data Structures

struct  ccur_fgetsLine
struct  RTDBMetaInfo
struct  ItemValue
struct  ItemValueScalar
struct  ItemValueDef
struct  ItemValueDefScalar
union  RawValue
struct  ARINC429LabelProperties
struct  ARINCTable
struct  CANIdProperties
struct  CANTable
struct  SENTIdProperties
struct  SENTTable
struct  LINIdProperties
struct  LINTable
struct  CalibrationEntry
struct  HardwareConfig
struct  EUConversion
struct  RTDBItemMeta
union  HardWareRecord
struct  RTDBItemAux
struct  RTDBSpareItem
struct  RTDBSpareItemTable
struct  RTDBItemData
struct  RTDBItem
struct  RTDBItemPair
struct  RTDBStructDef
struct  RTDBItemMetaPair
struct  RTDBItemMetaMappingPair
struct  RTDBItemValuePair
struct  RTDBItemInitCondition
struct  RTDBItemLogging
struct  BoardUserHookMappingDefn
struct  IOSerialChannelDef
struct  IOARINC429ChannelDef
struct  AFDXSymbolDef
struct  IOAFDXMessage
struct  IONETMessage
struct  IOUDPHeader
struct  IOUDPMessage
struct  IOCIGIMessage
struct  IOFDXMessage
struct  RTMAPSProps
struct  AFDXResidentMessage
struct  RTMAPSResidentMessage
struct  NETResidentMessage
struct  UDPResidentMessage
struct  CIGIResidentMessage
struct  FDXResidentMessage
struct  IOAFDXVirtualLink
struct  IORS232Message
struct  IOFlexRayMessage
struct  IOMemoryRegion
struct  IOArionObject
struct  IORtadbMessage
struct  IODDC1553Message
struct  IOHITV370Property
struct  PWM1012Properties
struct  PWM1112Properties
struct  SENTChannelProperties
struct  SENTProperties
struct  NAI79C3SF6ChannelProperties
struct  NAI79C3SF6ModuleProperties
struct  NAI79C3SF6Properties
struct  NAI79C3E7Properties
struct  CPMFIOProperties
struct  IOSerialBoardDef
struct  SerialBinaryMessage
struct  IOBoardDef
struct  ScriptStdIO

Defines

#define mkppRev2(name1, name2)   name1 ## name2
#define mkppRev(name1, name2)   mkppRev2(name1,name2)
#define ppREV   mkppRev(pp,__LINE__)
#define REV_STRING(string)   static const char *cvsRev=string; const char **ppREV = &cvsRev
#define MAX_TAGLEN   512
#define MAX_EUNITSLEN   12
#define MAX_DIMENSIONS   8
#define MAX_STRUCTDEPTH   30
#define MAX_DESCRIPTIONLEN   256
#define MAX_SUITETESTS   50
#define MAX_STRINGVARIABLELEN   1024
#define MAX_IOBOARDNAME   64
#define MAX_AFDXMSGNAME   64
#define MAX_FDXMSGNAME   64
#define MAX_FDXVARNAME   10
#define MAX_CIGINAME   64
#define MAX_CIGIOUTPACKETS   128
#define MAX_RS232MSGNAME   64
#define MAX_RTWPROGRAMS   30
#define MAX_RTWMULTIRATES   20
#define MAX_MAPPINGVARNAME   64
#define MAX_HOSTNAME   33
#define MAX_INITCONDNAME   64
#define MAX_NUMBEROFCPUS   32
#define MAX_ENVFILENAME   64
#define MAX_SESSIONUSERPARM   256
#define MAX_FLEXRAYMSGNAME   64
#define MAX_FLEXRAYCLUSTERNAME   64
#define MAX_IOMAPPINGS   16
#define MAX_IORECORDNAME   256
#define MAX_USERHARDWAREADDRESSSPACE   512
#define USER_BOARDFIRSTID   1000
#define MAX_MEMREGIONNAME   64
#define MAX_EUCONVERSIONNAME   128
#define MAX_EUCONVERSIONRECORDS   10000
#define MAX_WAVEFILENAME   128
#define MAX_1553MSGNAME   64
#define MAX_1553BUFFERLEN   64
#define MAX_ARIONOBJNAME   64
#define MAX_RTADBMSGNAME   64
#define MAX_PARMSIZEVISIBLE   3500
#define MAX_PROJECTNAME   64
#define DEFAULT_PROJECTNAME   "<default>"
#define MAX_SPAREITEMS   120
#define MAX_GROUPNAME   16
#define MAX_STRUCTENTRIES   100
#define GUI_CLIENTISCC   400
#define GUI_CLIENTISHMI   401
#define GUI_CLIENTISBUILDER   0x200
#define GUI_CLIENTAPPMASK   0xff
#define MAX_ECATMASTER_BOARDS   4
#define MAX_ECATDEVICENAMELENGTH   32
#define MAX_ECATDOMAINNAME   32
#define MAX_ECATDOMAINS   20
#define MAX_ECATSLAVES   100
#define MAX_ECATSLAVE_BOARDS   4
#define MAX_PDODESCRIPTION   64
#define MAX_FORMNAME   64
#define MAX_TABLECANENTRIES   2048
#define MAX_TABLELINENTRIES   512
#define MAX_TABLESENTENTRIES   128
#define MAX_ARINCLABELENTRIES   (8*256*36)
#define MAX_VTD_PKGNAME   64
#define CARMAKER_EXECNAME   "CarMaker.linux64"
#define MAX_POINTSPERID   100
#define MAX_IO_SHUTDOWNTIME   10
#define MAX_RTDB_PROP_FILES   33
#define ccurMax(a, b)   ((a) > (b) ? (a) :(b))
#define ccurMin(a, b)   ((a) < (b) ? (a) :(b))
#define POINTGROUP_MASK   0xf
#define POINTDIRECTION_MASK   0xf0
#define POINT_MASK   (POINTGROUP_MASK | POINTDIRECTION_MASK)
#define POINTDIRECTIONRT_MASK   0xf000
#define RTDB_ISINPUT(pType)   ((pType & POINTDIRECTION_MASK) & SimWB_DIR_INPUT)
#define RTDB_ISOUTPUT(pType)   ((pType & POINTDIRECTION_MASK) & SimWB_DIR_OUTPUT)
#define RTDB_ISDIGITAL(pType)   ((pType & POINTGROUP_MASK) == SimWB_BOOLEAN )
#define RTDB_ISANALOG(pType)   ((pType & POINTGROUP_MASK) == SimWB_ANALOG )
#define RTDB_ISSTRING(pType)   ((pType & POINTGROUP_MASK) == SimWB_STRING )
#define RTDB_ISRTINPUT(pType)   (pType & SimWB_DIR_RTINPUT)
#define RTDB_ISRTOUTPUT(pType)   (pType & SimWB_DIR_RTOUTPUT)
#define MAX_DBNAME   64
#define MAX_DBDESCRIPTION   256
#define MAX_SESSIONID   128
#define MAX_TESTID   128
#define MAX_RTDBLOAD   16
#define MAX_SIMWBBOARDS   32
#define CAN_CTRL_MAPPING   0
#define CAN_CTRL_PAUSERESUME   1
#define CAN_CTRL_TXNOW   2
#define CAN_CTRL_SCHEDFIFO   3
#define CAN_CTRL_TXONCHANGE   4
#define CAN_CTRL_SCHEDRATE   5
#define CAN_ASYNCIO_RUNSCHED   250
#define CAN_SCHEDRATE_MULT   (1000/CAN_ASYNCIO_RUNSCHED)
#define HDLC_RX_MAPPING   1
#define SENT_CTRL_FAST_CHANNEL   0
#define SENT_CTRL_SHORT_CHANNEL   1
#define SENT_CTRL_ENHANCED_CHANNEL   2
#define SENT_CTRL_STATUS_BIT0   3
#define SENT_CTRL_STATUS_BIT1   4
#define SENT_CTRL_PAUSE_RESUME   5
#define MAX_CPSENTSLOTS   10
#define EU_RAWTOPHYSICAL   0x80
#define EU_MAXTABLEENTRIES   50
#define EU_MAXPOLYNOMIAL   3
#define EU_LINEARCONVERSION   0x1
#define EU_1OVERXCONVERSION   0x2
#define EU_ERRORNOINVERSION   0x1
#define MAX_NAMESPACE   128
#define MAX_AI64SSCHANNELS   64
#define MAX_AI64LLCHANNELS   64
#define MAX_AD3224_DSCHANNELS   32
#define MAX_AD6418_CHANNELS   64
#define MAX_DA3218_CHANNELS   32
#define MAX_CPMFIOBOARDS   6
#define MAX_CPMFIOCHANNELS_IN   16
#define MAX_CPMFIOCHANNELS_OUT   16
#define MAX_CPMFIOBITS   96
#define MAX_LCAIOBOARDS   6
#define MAX_LCAIOCHANNELS_IN   32
#define MAX_LCAIOCHANNELS_OUT   4
#define MAX_LCAIOBITS   18
#define MAX_16AO12CHANNELS   16
#define MAX_16AO16BOARDS   10
#define MAX_16AO16WAVEBOARDS   5
#define MAX_DA3218WAVEBOARDS   5
#define MAX_PK50_295CHANNELS   10
#define MAX_PK50_110CHANNELS   64
#define MAX_PDAQAOCHANNELS   96
#define MAX_DIO96BITS   96
#define MAX_DIO96INBOARDS   4
#define MAX_DIO96OUTBOARDS   4
#define MAX_RFACTOR_PROXIMITYQUERIES   10
#define MAX_NAI76C2BITS   48
#define MAX_ADLINK7256_DOBITS   16
#define MAX_ADLINK7256_BOARDS   4
#define MAX_ADLINK7296_BITS   96
#define MAX_ADLINK7230_DIBITS   16
#define MAX_ADLINK7230_DOBITS   16
#define MAX_ARINC429CHANNELS   16
#define MAX_ARINC429LABELS   256
#define MAX_ARINC429BOARDS   4
#define MAX_BTILX429BOARDS   4
#define MAX_BTILX429CHANNELS   32
#define MAX_DD42992BOARDS   8
#define MAX_DD42992LABELS   256
#define MAX_DD42992CHANNELS   36
#define MAX_AFDXBOARDS   4
#define MAX_AFDXMESSAGELEN   8196
#define MAX_AFDXVIRTUALLINKS   50
#define MAX_MSGPERVL   50
#define MAX_AFDXMESSAGES   (MAX_AFDXBOARDS*MAX_AFDXVIRTUALLINKS*MAX_MSGPERVL)
#define MAX_AITAFDXBOARDS   3
#define MAX_NETMSGS   256
#define MAX_NETBOARDS   4
#define MAX_NETMSGNAME   64
#define MAX_NETMESSAGELEN   262144
#define MAX_NETMESSAGES   (MAX_NETBOARDS*MAX_NETMSGS)
#define MAX_RTMAPSBOARDS   4
#define MAX_RTMAPSMESSAGELEN   262144
#define RTMAPS_MINRATE   1
#define MAX_UDPMSGS   100
#define MAX_UDPBOARDS   2
#define MAX_UDPMESSAGELEN   262144
#define MAX_UDPMESSAGES   (MAX_NETBOARDS*MAX_NETMSGS)
#define MAX_FDXGRPS   256
#define MAX_FDXBOARDS   4
#define MAX_FDXMESSAGELEN   16386
#define MAX_FDXMESSAGES   (MAX_FDXBOARDS*MAX_FDXGRPS)
#define MAX_NAI79C3SF6_CHANNELS   12
#define MAX_NAI79C3SF6_MODULES   3
#define MAX_NAI79C3SF6_CHANNELS_PER_MODULE   4
#define MAX_NAI79C3SF6_SF_MODULE_CHANNELS   4
#define MAX_NAI79C3SF6_6D_MODULE_CHANNELS   3
#define MAX_NAI79C3SF6_E7_MODULE_CHANNELS   4
#define NAI79C3SF6_MODULE_MODEL_6D   0x3644
#define NAI79C3SF6_MODULE_MODEL_SF   0x5346
#define NAI79C3SF6_MODULE_MODEL_Z0   0x5A30
#define NAI79C3SF6_MODULE_MODEL_E7   0x4537
#define NAI79C3SF6_SF_MAXRPS   190
#define MAX_RESOLVERCHANNELS   6
#define MAX_RESOLVERCHANNELS_INPUT   8
#define MAX_RESOLVERBOARDS   8
#define MAX_RVDTCHANNELS   12
#define MAX_RVDTCHANNELS_INPUT   8
#define MAX_RVDTBOARDS   2
#define MAX_RS232BOARDS   2
#define MAX_RS232MESSAGELEN   1024
#define MAX_RS232MESSAGES   32
#define MAX_RS232CHANNELS   16
#define MAX_CANNETS   4
#define MAX_CANBOARDS   12
#define MAX_CANIDS   100
#define MAX_CANMESSAGELEN   64
#define MAX_VIRTCANNETS   12
#define MAX_SOCKCANNETS   4
#define MAX_NVARXCANNETS   6
#define MAX_PEAKCANBOARDS   3
#define MAX_PEAKCANNETS   2
#define MAX_LINBOARDS   12
#define MAX_LINIDS   100
#define MAX_LINMESSAGELEN   8
#define MAX_MOXABOARDS   10
#define MAX_MOXACHANNELS   8
#define MAX_MGTXBOARDS   4
#define MAX_MGTXCHANNELS   4
#define MAX_SIOXBOARDS   2
#define MAX_SIOXCHANNELS   8
#define MAX_SIOHDLCBOARDS   2
#define MAX_SIOHDLCCHANNELS   4
#define MAX_RESOLVERCHANNELS   6
#define MAX_RESOLVERCHANNELS_INPUT   8
#define MAX_RESOLVERBOARDS   8
#define MAX_RVDTCHANNELS   12
#define MAX_RVDTCHANNELS_INPUT   8
#define MAX_RVDTBOARDS   2
#define MAX_JOYSTICKBUTTONS   12
#define MAX_JOYSTICKAXIS   8
#define MAX_LOGIWHEELBUTTONS   22
#define MAX_LOGIWHEELAXIS   6
#define MAX_FANPODPRIMARY   5
#define MAX_FANPODBUTTON   24
#define MAX_FANPODLED   (15*3)
#define MAX_FANPODJSAXIS   (1*2)
#define MAX_PEAKCANBOARDS   3
#define MAX_PEAKCANNETS   2
#define MAX_ROCKETPORTBOARDS   2
#define MAX_ROCKETPORTCHANNELS   32
#define MAX_FASTCOMMBOARDS   4
#define MAX_FASTCOMMCHANNELS   8
#define MAX_SERIALCHANNELS   16
#define MAX_SERIALBOARDS   8
#define MAX_FLEXRAYBOARDS   8
#define MAX_FLEXRAYMESSAGELEN   128
#define MAX_FLEXRAYMESSAGES   256
#define MAX_EB5100BOARDS   3
#define MAX_MEMORYREGIONS   25
#define MAX_1553CHANNELS   8
#define MAX_1553BOARDS   2
#define MAX_1553RTS   32
#define MAX_1553MAILBOXES   32
#define MAX_TMC12CHANNELS   6
#define MAX_ARIONBOARDS   1
#define MAX_ARIONOBJECTS   512
#define MAX_ARIONIDT   0xffffff
#define MIN_ARIONIDT   0x1000
#define MAX_ARIONSIZE   262132
#define MAX_RTADBBOARDS   1
#define MAX_VMIC4132_CHANNELS   32
#define MAX_VMIC3122_CHANNELS   64
#define MAX_PAS2581_CHANNELS   40
#define MAX_NAI64DL1_CHANNELS   16
#define MAX_VMIC2210_BITS   64
#define MAX_PAS9795_BITS   72
#define MAX_PAS9782_CHANNELS   8
#define MAX_ADVTECH1758_BITS   128
#define MAX_NIESERIESAICHANNELS   64
#define MAX_NIESERIESDIOBITS   8
#define MAX_NIESERIESAOCHANNELS   2
#define MAX_NIESERIESCOUNTERS   2
#define MAX_NI670XAOCHANNELS   16
#define MAX_NI670XDIOBITS   8
#define MAX_HITV370_CHANNELS   4
#define MAX_HITV370_BOARDS   4
#define MAX_PWM1012_CHANNELS   12
#define MAX_PWM1012_BOARDS   4
#define MAX_PWM1112_CHANNELS   12
#define MAX_PWM1112_BOARDS   4
#define MAX_OPTO32BITS_IN   24
#define MAX_OPTO32BITS_OUT   8
#define MAX_OPTO16X16BITS_IN   16
#define MAX_OPTO16X16BITS_OUT   16
#define MAX_SENSOWHEELS   2
#define MAX_CIGISESSIONS   4
#define MAX_CIGIPROPERTIES   20
#define MAX_VTDSESSIONS   4
#define MAX_VTD_PACKETS   100
#define MAX_CPSENT_CHANNELS   12
#define MAX_CPSENT_BOARDS   3
#define MAX_CPSENT_IDS   4
#define MAX_CPSENT_NIBBLES   6
#define MAX_SENTMESSAGELEN   6
#define MAX_CPWSSENSOR_CHANNELS   4
#define MAX_KNOCKSENSOR_CHANNELS   16
#define MAX_ACRO_AP231CHANNELS   16
#define MAX_ACRO_AP341CHANNELS   16
#define MAX_ACRO_AP441CHANNELS   32
#define MAX_ACRO_AP445CHANNELS   32
#define MAX_ACRO_AP408CHANNELS   32
#define MAX_ACRO_AP503CHANNELS   36
#define MAX_ACC_IIRO16CHANNELS   16
#define MAX_UEGOBOARDS   4
#define MAX_UEGOCHANNELS   4
#define MAX_UEGOCONTROLS   15
#define UEGO_DATA_TABLE   1
#define UEGO_DATA_POLY   2
#define UEGO_MAX_TABLEENTRIES   40
#define UEGO_MAX_POLYS   4
#define UEGO_SENSOR_NARROWBAND   1
#define UEGO_SENSOR_WIDEBAND   2
#define UEGO_CTRL_LAMBDA   0
#define UEGO_CTRL_HEATER   1
#define UEGO_CTRL_UN_FAULT_OPEN   3
#define UEGO_CTRL_UN_FAULT_GND   4
#define UEGO_CTRL_UN_FAULT_VBAT   5
#define UEGO_CTRL_VM_FAULT_OPEN   6
#define UEGO_CTRL_VM_FAULT_GND   7
#define UEGO_CTRL_VM_FAULT_VBAT   8
#define UEGO_CTRL_IP_FAULT_OPEN   9
#define UEGO_CTRL_IP_FAULT_GND   10
#define UEGO_CTRL_IP_FAULT_VBAT   11
#define UEGO_CTRL_IA_FAULT_OPEN   12
#define UEGO_CTRL_IA_FAULT_GND   13
#define UEGO_CTRL_IA_FAULT_VBAT   14
#define MAX_RESSIMBOARDS   4
#define MAX_RESSIMCHANNELS   16
#define MAX_RESSIMCONTROLS   6
#define RESSIM_CTRL_RESISTANCE   0
#define RESSIM_CTRL_FAULT_RA_GND   1
#define RESSIM_CTRL_FAULT_RA_VPLUS   2
#define RESSIM_CTRL_FAULT_RB_GND   3
#define RESSIM_CTRL_FAULT_RB_VPLUS   4
#define RESSIM_CTRL_FAULT_OPEN   5
#define FPGA_MAX_ADC_CHANNELS   16
#define FPGA_MAX_ANALOG_OUT   16
#define FPGA_MAX_ANALOG_IN   16
#define FPGA_MAX_DIGITAL   96
#define FPGA_DIGITAL_GROUPSIZE   4
#define ARRIAX_DC_MAX_ANALOG_OUT   12
#define ARRIAX_DC_MAX_ANALOG_IN   12
#define ARRIAX_MAX_DIGITAL   32
#define ARRIAX_DC_MAX_DIGITAL   32
#define ARRIAX_DC_DIGITAL_GROUPSIZE   4
#define FPGA_MAX_CYLINDERS   16
#define FPGA_MAX_PULSECAPTURE_CHANNELS   32
#define FPGA_MAX_CAMSHAFTS   4
#define FPGA_POINT_PER_PULSECAPTURE_CHANNEL   6
#define FPGA_POINT_PER_PMSM_ELECTRIC_MOTOR_CHANNEL   4
#define FPGA_MAX_PWMOUT   96
#define FPGA_MAX_PWMIN   96
#define FPGA_MAX_ANALOG_THRESHOLD   32
#define FPGA_MAX_TOOTHWHEEL   32
#define FPGA_MAX_ENCODERS   32
#define FPGA_MAX_DECODERS   32
#define FPGA_MAX_WAVEGEN_CHANNELS   32
#define FPGA_MAX_HPFP   32
#define FPGA_MAX_INVERTER   1
#define FPGA_MAX_UVW_ENCODERS   32
#define FPGA_MAX_PMSM_ELECTRIC_MOTOR   1
#define FPGA_MAX_FOC_X1   1
#define FPGA_MAX_KNOCK_SENSOR   8
#define FPGA_MAX_RESOLVER_TX   32
#define FPGA_MAX_LVDT_RVDT_TX   32
#define FPGA_MAX_SYNCHRO_TX   32
#define FPGA_MAX_RESOLVER_RX   32
#define FPGA_MAX_LVDT_RVDT_RX   32
#define FPGA_MAX_SYNCHRO_RX   32
#define FPGA_MAX_MULTIPLEXER   96
#define FPGA_MAX_MUXPERCH   96
#define FPGA_MAX_SENT_TX   32
#define FPGA_MAX_SENT_RX   32
#define FPGA_MAX_SIO_TX   4
#define FPGA_MAX_SIO_RX   4
#define FPGA_MAX_REGISTER_WRITE   128
#define FPGA_MAX_REGISTER_READ   128
#define FPGA_MAX_NPHASE_WAVEGEN_CHANNELS   32
#define FPGA_NPHASE_WAVEGEN_MAXPHASES   16
#define FPGA_MAX_WAVEGEN_RX_CHANNELS   32
#define FPGA_MAX_SPI_MASTER_CHANNELS   8
#define FPGA_MAX_SPI_MASTER_CS   6
#define FPGA_MAX_SPI_SLAVE_CHANNELS   8
#define FPGA_MAX_SPI_MASTER_CL   32
#define FPGA_MAX_CLOCKS   8
#define FPGA_MAX_WSS_CHANNELS   32
#define FPGA_MAX_WSS_MAGNETS   512
#define FPGA_MAX_CIC_CHANNELS   32
#define FPGA_MAX_IIR_CHANNELS   32
#define FPGA_MAX_RECORDER_CHANNELS   16
#define FPGA_POINT_PER_HPFP_CHANNEL   3
#define FPGA_POINT_PER_THRESHOLD_CHANNEL   2
#define FPGA_MAX_SENT_TX_NIBBLES   6
#define FPGA_MAX_SENT_TX_DATA   512
#define FPGA_MAX_SENT_RX_NIBBLES   6
#define FPGA_MAX_SENT_RX_DATA   512
#define FPGA_CTRL_CRANKSHAFT_RPM   1
#define FPGA_CTRL_ENGINE_ENABLE   2
#define FPGA_CTRL_CRANKSHAFT_ANGLE   3
#define FPGA_CTRL_CAMSHAFT_ADVANCE   5
#define FPGA_CTRL_IGNINJ_CH   10
#define FPGA_CTRL_ANAOUT   60
#define FPGA_CTRL_ANAIN   80
#define FPGA_CTRL_ANAIN_INPUT_VOLTAGE   81
#define FPGA_CTRL_ANAIN_THRESHOLD_OUTPUT   82
#define FPGA_CTRL_DIGITAL   100
#define FPGA_CTRL_PWMOUT_FREQ   40
#define FPGA_CTRL_PWMOUT_DUTYCYCLE   41
#define FPGA_CTRL_PWMOUT_ONESHOTCOUNT   42
#define FPGA_CTRL_PWMIN_FREQ   50
#define FPGA_CTRL_PWMIN_DUTYCYCLE   51
#define FPGA_CTRL_PWMIN_PULSECOUNT   52
#define FPGA_CTRL_DECODER_COUNTER   70
#define FPGA_CTRL_DECODER_ANGLE   71
#define FPGA_CTRL_DECODER_RPM   72
#define FPGA_CTRL_ENCODER_RPM   75
#define FPGA_CTRL_ENCODER_ANGLE   76
#define FPGA_CTRL_WAVEGEN_FREQ   78
#define FPGA_CTRL_HPFP_CH   73
#define FPGA_CTRL_TOOTHWHEELRPM   120
#define FPGA_CTRL_TOOTHWHEELANGLE   121
#define FPGA_CTRL_INVERTER_VOLTAGE   77
#define FPGA_CTRL_UVW_ENCODER_RPM   79
#define FPGA_CTRL_UVW_ENCODER_ANGLE   83
#define FPGA_CTRL_PMSM_ELECTRIC_MOTOR_TLOAD   84
#define FPGA_CTRL_FOC_X1_RPM   85
#define FPGA_CTRL_FOC_X1_FREQUENCY   86
#define FPGA_CTRL_KNOCK_SENSOR_DC_OFFSET   87
#define FPGA_CTRL_KNOCK_SENSOR_GAIN   88
#define FPGA_CTRL_KNOCK_SENSOR_CRANK_ANGLE   89
#define FPGA_CTRL_KNOCK_SENSOR_KNOCK_OUT   90
#define FPGA_CTRL_PMSM_ELECTRIC_MOTOR_INFO   91
#define FPGA_CTRL_RESOLVER_TX_FREQ   92
#define FPGA_CTRL_RESOLVER_TX_DATA   93
#define FPGA_CTRL_LVDT_RVDT_TX_FREQ   94
#define FPGA_CTRL_LVDT_RVDT_TX_DATA   95
#define FPGA_CTRL_SYNCHRO_TX_FREQ   96
#define FPGA_CTRL_SYNCHRO_TX_DATA   97
#define FPGA_CTRL_MUX_CONTROL   98
#define FPGA_CTRL_SENT_TX_STATE   101
#define FPGA_CTRL_SENT_TX_NIBBLE_NUMBER   102
#define FPGA_CTRL_SENT_TX_NIBBLES   103
#define FPGA_CTRL_SENT_TX_DATA   104
#define FPGA_CTRL_SENT_RX_ERROR_RATE   105
#define FPGA_CTRL_SENT_RX_NIBBLES   106
#define FPGA_CTRL_SENT_RX_DATA   107
#define FPGA_CTRL_SIO_TX_DATA   108
#define FPGA_CTRL_SIO_RX_DATA   109
#define FPGA_CTRL_SIO_TX_COUNT   110
#define FPGA_CTRL_SIO_RX_COUNT   111
#define FPGA_CTRL_REGISTER_WRITE_DATA   112
#define FPGA_CTRL_REGISTER_WRITE_PROG_DATA   113
#define FPGA_CTRL_REGISTER_READ_DATA   114
#define FPGA_CTRL_LVDT_RVDT_RX_ANGULAR_POSITION   126
#define FPGA_CTRL_LVDT_RVDT_RX_SPEED   127
#define FPGA_CTRL_LVDT_RVDT_RX_RPM   128
#define FPGA_CTRL_LVDT_RVDT_RX_DIRECTION   129
#define FPGA_CTRL_RESOLVER_RX_ANGULAR_POSITION   116
#define FPGA_CTRL_RESOLVER_RX_SPEED   117
#define FPGA_CTRL_RESOLVER_RX_RPM   118
#define FPGA_CTRL_RESOLVER_RX_DIRECTION   119
#define FPGA_CTRL_SYNCHRO_RX_ANGULAR_POSITION   122
#define FPGA_CTRL_SYNCHRO_RX_SPEED   123
#define FPGA_CTRL_SYNCHRO_RX_RPM   124
#define FPGA_CTRL_SYNCHRO_RX_DIRECTION   125
#define FPGA_CTRL_NPHASE_WAVEGEN_FREQ   130
#define FPGA_CTRL_NPHASE_WAVEGEN_PHASE   131
#define FPGA_CTRL_NPHASE_WAVEGEN_AMPLITUDE   132
#define FPGA_CTRL_WAVEGEN_RX_FREQ   134
#define FPGA_CTRL_WAVEGEN_RX_MAGNITUDE   133
#define FPGA_CTRL_WAVEGEN_RX_FREQ_TX   135
#define FPGA_CTRL_SPI_MASTER_CSSELECTION   136
#define FPGA_CTRL_SPI_MASTER_COMMANDCODE   137
#define FPGA_CTRL_SPI_MASTER_NUMITERATIONS   138
#define FPGA_CTRL_SPI_MASTER_FRAMESIZE   139
#define FPGA_CTRL_SPI_MASTER_RAMSTARTADDRESS   140
#define FPGA_CTRL_SPI_MASTER_GO   141
#define FPGA_CTRL_SPI_MASTER_INFINITE   142
#define FPGA_CTRL_SPI_MASTER_BREAK   143
#define FPGA_CTRL_SPI_MASTER_WAITING   144
#define FPGA_CTRL_SPI_MASTER_INVALID   145
#define FPGA_CTRL_SPI_MASTER_FIFOCOUNT   146
#define FPGA_CTRL_SPI_MASTER_WATERMARK   147
#define FPGA_CTRL_SPI_MASTER_EMPTY   148
#define FPGA_CTRL_SPI_MASTER_DATATX   149
#define FPGA_CTRL_SPI_MASTER_DATARX   150
#define FPGA_CTRL_SPI_MASTER_SKIPDATATX   151
#define FPGA_CTRL_SPI_MASTER_SKIPDATARX   152
#define FPGA_CTRL_SPI_SLAVE_SPIMODE   153
#define FPGA_CTRL_SPI_SLAVE_FIFOENABLE   154
#define FPGA_CTRL_SPI_SLAVE_FIFOMSB   155
#define FPGA_CTRL_SPI_SLAVE_ADDRESSINMSB   156
#define FPGA_CTRL_SPI_SLAVE_DATAINMSB   157
#define FPGA_CTRL_SPI_SLAVE_DATAOUTMSB   158
#define FPGA_CTRL_SPI_SLAVE_COMMANDSIZE   159
#define FPGA_CTRL_SPI_SLAVE_DATASIZE   160
#define FPGA_CTRL_SPI_SLAVE_DATAREAD   161
#define FPGA_CTRL_SPI_SLAVE_REGISTERCONTROL   164
#define FPGA_CTRL_SPI_SLAVE_ERRORCOUNT   165
#define FPGA_CTRL_SPI_SLAVE_FIFOCOUNT   166
#define FPGA_CTRL_SPI_SLAVE_VALIDPACKETCOUNT   167
#define FPGA_CTRL_SPI_SLAVE_BUFFERRESPONSE   168
#define FPGA_CTRL_SPI_SLAVE_SIGNATURERESPONSE   169
#define FPGA_CTRL_SPI_SLAVE_DATA   170
#define FPGA_CTRL_SPI_SLAVE_FIFODATA   171
#define FPGA_CTRL_SPI_SLAVE_PACKETTOTALRESET   172
#define FPGA_CTRL_SPI_SLAVE_ERRORCOUNTRESET   173
#define FPGA_CTRL_SPI_SLAVE_MEMORYRESET   174
#define FPGA_CTRL_SPI_SLAVE_SAMPLEEDGERESET   175
#define FPGA_CTRL_SPI_SLAVE_PORTFLAGS   176
#define FPGA_CTRL_SPI_MASTER_DELAY   177
#define FPGA_CTRL_SPI_MASTER_MEMORYRESET   178
#define FPGA_CTRL_SPI_MASTER_GOING   179
#define FPGA_CTRL_SPI_MASTER_STATE   180
#define FPGA_CTRL_SPI_MASTER_DCOMMANDCODE   181
#define FPGA_CTRL_SPI_MASTER_DCSSELECTION   182
#define FPGA_CTRL_SPI_MASTER_DFRAMESIZE   183
#define FPGA_CTRL_SPI_MASTER_DRAMSTARTADDRESS   184
#define FPGA_CTRL_SPI_MASTER_CURRENTINDEX   185
#define FPGA_CTRL_WSS_RPM   186
#define FPGA_CTRL_WSS_FCI   187
#define FPGA_CTRL_WSS_FM   188
#define FPGA_CTRL_WSS_AKDATA   189
#define FPGA_CTRL_WSS_DF11STRENGTH   190
#define FPGA_CTRL_SIO_TX_NUMPACKETS   191
#define FPGA_CTRL_SIO_TX_NUMWORDSINPACKET0   192
#define FPGA_CTRL_SIO_TX_NUMWORDSINPACKET1   193
#define FPGA_CTRL_SIO_TX_NUMWORDSINPACKET2   194
#define FPGA_CTRL_SIO_TX_FRAMECOUNT   195
#define FPGA_CTRL_SIO_TX_RCIMEDGECOUNT   196
#define FPGA_CTRL_SIO_RX_NUMWORDSPERPACKET   198
#define FPGA_CTRL_SIO_RX_CLEARCOUNT   202
#define FPGA_CTRL_LVDS   203
#define FPGA_CTRL_DC_DIGITAL   204
#define FPGA_CTRL_RECORDER_PAUSE   205
#define MAX_UNITDEFS   256
#define MAX_HRTB4702CHANNELS   (12+1)
#define NI_BOARD_MASK   0x100
#define NI_MAX_BOARDID   0x200
#define NI_CTR_CLEARVARAFTERTRIGGER   0x01
#define NI_CTR_DECRTOZERO   0x04
#define NI_CTR_NONCUMULATIVE   0x02
#define AFDX_MAXNAMELEN   128
#define RTMAPS_CTRL_MAPPING   0
#define RTMAPS_CTRL_PAUSERESUME   1
#define RTMAPS_CTRL_TXNOW   2
#define RTMAPS_CTRL_SCHEDFIFO   3
#define RTMAPS_CTRL_TXONCHANGE   4
#define RTMAPS_CTRL_SCHEDRATE   5
#define NET_CTRL_MAPPING   0
#define NET_CTRL_PAUSERESUME   1
#define NET_CTRL_TXNOW   2
#define NET_CTRL_SCHEDFIFO   3
#define NET_CTRL_TXONCHANGE   4
#define NET_CTRL_SCHEDRATE   5
#define FDX_CTRL_MAPPING   0
#define FDX_CTRL_PAUSERESUME   1
#define FDX_CTRL_TXNOW   2
#define FDX_CTRL_SCHEDFIFO   3
#define FDX_CTRL_TXONCHANGE   4
#define FDX_CTRL_SCHEDRATE   5
#define DDC1553_CTRL_MAPPING   0
#define DDC1553_CTRL_TXNOW   1
#define DDC1553_MODECODE_WORD   2
#define DDC1553_RT_MODECODE   3
#define DDC1553_RT_MODECODE_W   4
#define DDC1553_RT_STATUS_W   5
#define MAXCSCRIPT_INPUTSTRLEN   256
#define MAXCSCRIPT_OUTPUTSTRLEN   256
#define MAXCSCRIPT_OUTPUTSTRINGS   1024
#define SOURCE_ASYNC   0x80
#define SOURCE_PGMMASK   0x7f
#define DLOGGER_PAUSE   1
#define DLOGGER_CIRCULARSTOP   2
#define DLOGGER_RESUME   4
#define DLOGGER_NEWITEM   8
#define CIRCLOGGER_NORMAL   0
#define CIRCLOGGER_TAKELOCK   1
#define CIRCLOGGER_NEXTFILE   2
#define IPC_REFRESH   7698
#define IPC_ASAM   7699
#define IPC_SYNCASYNC   7700
#define SIMWB_IPSSHM_START   7995
#define DLLOGGERBUF_IPC   (SIMWB_IPSSHM_START)
#define ASYNCIOQ_IPC   (SIMWB_IPSSHM_START +1)
#define RTDB_IPC   (SIMWB_IPSSHM_START +2)
#define __bswap_float(x)
#define __bswap_double(x)
#define ATOMIC_INC(counter)
#define ATOMIC_DEC(counter)

Typedefs

typedef unsigned char StringVariableValue [MAX_STRINGVARIABLELEN]
typedef union HardWareRecord HardwareRecord
typedef struct RTDBItemPair * RTDBItemPairPtr
typedef char ItemName [MAX_TAGLEN]
typedef int(* UserHardwareAddressToString )(int boardId, const void *hardwareAddress, char *str)
typedef int(* UserStringToHardwareAddress )(int boardId, const char *str, void *hardwareAddress)

Enumerations

enum  pointGroup {
  SimWB_ANALOG = 1, SimWB_BOOLEAN = 2, SimWB_MBIT = 3, SimWB_STRING = 4,
  SimWB_PARAMETER = 8, SimWB_SHARED_PARAMETER = 10, SimWB_MDLSIGNAL = 12
}
enum  pointDirection { SimWB_DIR_INPUT = 0x10, SimWB_DIR_OUTPUT = 0x20, SimWB_DIR_INOUT = 0x30 }
enum  pointDirectionRT { SimWB_DIR_RTINPUT = 0x1000, SimWB_DIR_RTOUTPUT = 0x2000 }
enum  PointType {
  RTDBPARAMETER = SimWB_PARAMETER | SimWB_ANALOG | SimWB_DIR_INPUT, RTDBSHRDPARAMETER = SimWB_SHARED_PARAMETER | SimWB_ANALOG | SimWB_DIR_INPUT, RTDBAI = SimWB_ANALOG | SimWB_DIR_INPUT, RTDBAO = SimWB_ANALOG | SimWB_DIR_OUTPUT,
  RTDBAIO = SimWB_ANALOG | SimWB_DIR_INOUT, RTDBDI = SimWB_BOOLEAN | SimWB_DIR_INPUT, RTDBDO = SimWB_BOOLEAN | SimWB_DIR_OUTPUT, RTDBDIO = SimWB_BOOLEAN | SimWB_DIR_INOUT,
  RTDBSTRINGIN = SimWB_STRING | SimWB_DIR_INPUT, RTDBSTRINGOUT = SimWB_STRING | SimWB_DIR_OUTPUT, RTDBSTRINGIO = SimWB_STRING | SimWB_DIR_INOUT, RTDBSTRINGPARM = SimWB_STRING | SimWB_DIR_INOUT,
  RTDBMDLSIGNAL = SimWB_MDLSIGNAL | SimWB_ANALOG | SimWB_DIR_OUTPUT
}
enum  RTDB_CVTType {
  CVTTYPE_char = 1, CVTTYPE_uchar = 2, CVTTYPE_int = 3, CVTTYPE_uint = 4,
  CVTTYPE_float = 5, CVTTYPE_short = 6, CVTTYPE_ushort = 7, CVTTYPE_double = 8,
  CVTTYPE_llong = 9, CVTTYPE_string = 10
}
enum  RTDB_RawType {
  RAWTYPE_char = CVTTYPE_char, RAWTYPE_uchar = CVTTYPE_uchar, RAWTYPE_int = CVTTYPE_int, RAWTYPE_uint = CVTTYPE_uint,
  RAWTYPE_float = CVTTYPE_float, RAWTYPE_short = CVTTYPE_short, RAWTYPE_ushort = CVTTYPE_ushort, RAWTYPE_double = CVTTYPE_double,
  RAWTYPE_llong = CVTTYPE_llong, RAWTYPE_string = CVTTYPE_string, RAWTYPE_packed = 12, RAWTYPE_bit = 13,
  RAWTYPE_blob = 14
}
enum  RTDB_RunTimeFlags {
  RTDBFL_ALTVALUE = 0x1, RTDBFL_OPERATOR = 0x2, RTDBFL_ARCHIVEPAUSED = 0x4, RTDBFL_OUTOFEURANGE = 0x8,
  RTDBFL_OUTOFHARDWARERANGE = 0x10, RTDBFL_INVERTPARITY = 0x20, RTDBFL_RAWVALUE = 0x40, RTDBFL_IPA = 0x80
}
enum  IO_Flags {
  IOFL_29BITCANID = 0x1, IOFL_BIGENDIAN = 0x2, IOFL_BCDFORMAT = 0x4, IOFL_FIFOTX = 0x8,
  IOFL_TXONCHANGE = 0x10, IOFL_TXEVERYNFRAME = 0x20, IOFL_BCDSSM = 0x40, IOFL_CANID_RTR = 0x80,
  IOFL_INPUT_USER = 0x100, IOFL_OUTPUT_USER = 0x200, IOFL_SETUP_USER = 0x400, IOFL_Arinc429_SDI = 0x800,
  IOFL_CAN_EXTDATA = 0x1000, IOFL_CAN_FASTDATA = 0x2000, IOFL_CAN_NODATA = 0x4000, IOFL_SERIAL_NOMSGID = 0x8000,
  IOFL_CAN_MUX = 0x10000, IOFL_CAN_DBC = 0x20000
}
enum  MSGIO_Flags {
  MSGIO_TXNOW = 0x1, MSGIO_FIFO = 0x10, MSGIO_SCHED = 0x20, MSGIO_TXONCHANGE = 0x40,
  MSGIO_TXEVERYFRAME = 0x80, MSGIO_PAUSED = 0x100, MSGIO_TXSOFTTIMER = 0x200, MSGIO_INVERTPARITY = 0x400,
  MSGIO_VARIABLELENGTH = 0x800, MSGIO_Arinc429_SDI = 0x800, MSGIO_NODATA = 0x1000
}
enum  UEI_DevType {
  UEI_ANALOG = 1, UEI_DIGITAL = 2, UEI_MF101 = 3, UEI_ARINC429 = 4,
  UEI_CAN = 5, UEI_RELAY = 6, UEI_AFDX = 7
}
enum  UEI_MF101_SUBSYTEM {
  MF101_AI = 1, MF101_AO = 2, MF101_DI_FET = 3, MF101_DO_FET = 4,
  MF101_DI_TTL = 5, MF101_DO_TTL = 6
}
enum  EUConversionType { EU_RATFUNC = 1, EU_TABINTERP = 2, EU_TABNOINTERP = 3 }
enum  RTDB_MetaFlags {
  METAFL_HASEUCONVERSION = 1, METAFL_HASDEFAULT = 2, METAFL_HASEULIMITS = 4, METAFL_ARCHIVE = 8,
  METAFL_ARCHIVEENABLE = 0x10, METAFL_INVERTLOGICAL = 0x20, METAFL_SIGNEDEUVAL = 0x40, METAFL_CLAMP2EULIMIT = 0x80,
  METAFL_NOALTVALUE = 0x100, METAFL_PLAYBACK = 0x200, METAFL_CIRCULARLOGGER = 0x400, METAFL_READONLY = 0x800,
  METAFL_EUCONVRECORD = 0x1000, METAFL_ASYNCENTRY = 0x2000, METAFL_COLMAJOR = 0x4000, METAFL_SPARE = 0x8000,
  METAFL_NOSTRUCT = 0x10000
}
enum  CaptureType { CAPTURE_CSV, CAPTURE_INITCOND, CAPTURE_RTFORM, CAPTURE_MAT }
enum  SnapShotVars { SNAPSHOT_PARAMETERS = 1, SNAPSHOT_SIGNALS = 2, SNAPSHOT_RTDBIn = 4, SNAPSHOT_RTDBOut = 8 }
enum  CapType { TYPE_CAPTURE = 1, TYPE_SNAPSHOT = 2 }
enum  ARINC429_Speed { SPEED_LOW, SPEED_HIGH }
enum  ARINC429_Parity { PARITY_NONE, PARITY_EVEN, PARITY_ODD }
enum  Serial_Type { RS_232 = 1, RS_422 = 2, RS_423 = 3, RS_485 = 4 }
enum  BoardID {
  NotMapped = 0, AI64SS = 1, AO16 = 2, DIO96_IN = 3,
  DIO96_OUT = 4, ARINC429 = 5, AIM_AFDX = 6, RESOLVER_OUT = 7,
  RVDT_OUT = 8, RS232 = 9, GPIB = 10, JOYSTICK = 11,
  FLIGHTGEAR = 12, XPLANE = 13, NETJOYSTICK = 14, CANIO_ESD405 = 15,
  RESOLVER_IN = 16, RVDT_IN = 17, FLEXRAY = 18, IOIPA_T = 19,
  PDAQAO = 20, CANIO_PEAK = 21, EB5100 = 22, MEM_DEVICE = 23,
  LCAIO = 24, AI64LL = 26, ADLINK_7256 = 27, PK_50_295 = 28,
  PAS2080_IN = 29, PAS2080_OUT = 30, AO16_W = 31, DDC1553_67 = 32,
  PK_50_110 = 33, TMC12 = 34, MOXA_CPXX = 35, ARION = 36,
  VMIC_4132 = 37, VMIC_3122 = 38, VMIC_2210 = 39, NAI_64DL1 = 40,
  PAS_9782 = 41, PAS_9795 = 42, PAS_2581 = 43, HIT_V370 = 44,
  RTADB = 47, ECAT_MASTER = 48, ECAT_SLAVE = 49, FASTCOMM_SERIAL = 50,
  AI64SS_STREAM = 51, PWM_1012 = 52, BTI_Lx429 = 53, NETIO = 54,
  OPTO32 = 55, PWM_1112 = 56, LOGIWHEEL_G2X = 57, R_FACTOR = 58,
  SENSO_WHEEL = 59, AIT_AFDX = 60, UDP_PACKET = 61, AD3224_DS = 62,
  ADLINK_7230 = 63, ADLINK_7296 = 64, RTDBITEM_COPY = 65, NAI_76C2_K6 = 66,
  DA3218 = 67, R_FACTOR_TS = 68, ROCKET_PORT = 69, ELAB_ECAT_MASTER = 70,
  DD_429_92 = 71, BABY_LIN = 72, CP_FISC = 73, ESD_ECAT_SLAVE = 74,
  OPTO16X16 = 75, CIGI_IO = 76, CP_FPGA_ArV = 77, NAI_79C3_K6 = 78,
  SIOX_SERIAL = 79, CP_SENT = 80, CP_COS64 = 81, CP_MFIO = 82,
  DA3218_W = 83, NAI_79C3_SF6 = 84, CP_WSSENSOR = 85, CP_KNOCKSENSOR = 86,
  DOLPHIN_IX = 87, CAN_IXXAT = 88, CP_UEGO = 89, FDX = 90,
  SIO_HDLC = 91, CP_RESSIM = 92, NAI_79C3_E7 = 93, VTD = 94,
  CANIO_VIRT = 95, CANIO_SOCK = 96, HR_TB4702 = 97, CANIO_NV_ARX = 98,
  RTMAPS = 99, AD6418 = 100, XCP_SLAVE = 101, CANLIN_IXXAT_640 = 102,
  FANPOD_DD2 = 103, MICROGATE_GTX = 104, CP_CMFIO = 105, ROS2_MSGS = 106,
  ADVTECH_1758 = 107, IADS_SRC = 108, UEI = 109, CP_FPGA_ArX = 110,
  ACRO_AP231 = 111, ACRO_AP341 = 112, ACRO_AP408 = 113, ACRO_AP441_1 = 114,
  ACRO_AP441_2 = 117, ACRO_AP445 = 115, ACRO_AP503 = 116, ACC_IIRO16 = 118,
  NI6601 = NI_BOARD_MASK, NI6602 = NI_BOARD_MASK+1, NIDIO96 = NI_BOARD_MASK+2, NI6509 = NI_BOARD_MASK+3,
  NI6052 = NI_BOARD_MASK+4, NI6033 = NI_BOARD_MASK+5, NI6023 = NI_BOARD_MASK+6, NI6024 = NI_BOARD_MASK+7,
  NI6025 = NI_BOARD_MASK+8, NI6030 = NI_BOARD_MASK+9, NI6031 = NI_BOARD_MASK+10, NI6032 = NI_BOARD_MASK+11,
  NI6034 = NI_BOARD_MASK+12, NI6036 = NI_BOARD_MASK+13, NI6040 = NI_BOARD_MASK+14, NI6070 = NI_BOARD_MASK+15,
  NI6071 = NI_BOARD_MASK+16, NI6703 = NI_BOARD_MASK+20, NI6704 = NI_BOARD_MASK+21, NI6509_PCIE = NI_BOARD_MASK+22
}
enum  NIHardwareType { HardwareAnalog = 1, HardwareDigital = 2, HardwareCounter = 3 }
enum  NIAIType { NI_RSE = 1, NI_NRSE = 2, NI_DIFF = 3 }
enum  NICounterType {
  NICounter_Frequency = 1, NICounter_Ticks = 2, NICounter_Time = 3, NICounter_CountPulse = 4,
  NICounter_PulseWidth = 5, NICounter_FrequencyMeasure = 6, NICounter_2EdgesSeparation = 7, NICounter_MotionEncoder_X1 = 8,
  NICounter_MotionEncoder_X2 = 9, NICounter_MotionEncoder_X4 = 10, NICounter_MotionEncoder_2PulseCounting = 11, NICounter_SinglePulse = 12,
  NICounter_PulseTrain = 13, NICounter_SinglePeriod = 14, NICounter_PositionSensing = 15
}
enum  NIEncoderPhase { NICounter_EncoderAHBH = 1, NICounter_EncoderAHBL = 2, NICounter_EncoderALBH = 3, NICounter_EncoderALBL = 4 }
enum  Logical_Operator {
  LOGOP_GT = 1, LOGOP_GE = 2, LOGOP_LT = 3, LOGOP_LE = 4,
  LOGOP_EQ = 5, LOGOP_NE = 6, LOGOP_NOT = 7
}
enum  RtadbDimemsion { RTADB_DIM_SCALAR = 0, RTADB_DIM_VECTOR = 1, RTADB_DIM_MATRIX = 2 }
enum  RtadbNature { RTADB_NAT_LOGICAL = 0, RTADB_NAT_PHYSICAL = 1 }
enum  RtadbType {
  RTADB_TYP_BOOLEAN = 0, RTADB_TYP_DOUBLE = 1, RTADB_TYP_FLOAT = 2, RTADB_TYP_INT = 3,
  RTADB_TYP_SHORT = 4
}
enum  ProtocolType { Protocol_UDP = 1, Protocol_TCP = 2 }
enum  AFDX_NetConfig {
  AFDX_VL_NETA = 1, AFDX_VL_NETB = 2, AFDX_VL_NETBoth = 3, AFDX_VL_NETDelayA = 4,
  AFDX_VL_NETDelayB = 5, AFDX_VL_NETVL = 6
}
enum  AFDX_PortType { AFDX_PortSAP = 1, AFDX_PortUDP = 2 }
enum  AFDX_TXType { AFDX_TXQueue = 1, AFDX_TXSample = 2 }
enum  AFDX_VLType { AFDX_VL_TX = 1, AFDX_VL_RX = 2 }
enum  FlexRay_Type { FLEXRAY_TX = 1, FLEXRAY_RX = 2 }
enum  RS232_Type { RS232_TX = 1, RS232_RX = 2 }
enum  Buffer_Type { BUFFER_TX = 1, BUFFER_RX = 2 }
enum  NAI79C3_Mode_Type { NAI79C3_Resolver = 0, NAI79C3_Synchro = 3 }
enum  NAI79C3_E7_CounterMode_Type { NAI79C3_E7_QUAD_1X = 5, NAI79C3_E7_QUAD_2X = 6, NAI79C3_E7_QUAD_4X = 7 }
enum  NAI79C3_E7_IndexMode_Type {
  NAI79C3_E7_INDEXMODE_OFF = 0, NAI79C3_E7_INDEXMODE_LOAD_ON_I = 1, NAI79C3_E7_INDEXMODE_LATCH_ON_I = 2, NAI79C3_E7_INDEXMODE_GATE_ON_I = 3,
  NAI79C3_E7_INDEXMODE_RESET_ON_I = 4
}
enum  NAI79C3_Model_Type {
  MODEL_Z0 = 1, MODEL_SF = 2, MODEL_6D = 3, MODEL_W2 = 4,
  MODEL_E7 = 5
}
enum  Resolver_Type { RESOLVER_ROTSPEED = 1, RESOLVER_POSANGLE = 2 }
enum  RVDT_Type { RVDT_2WIRE = 1, RVDT_4WIRE = 2 }
enum  DDC1553_CtrlType { DDC1553_RT = 1, DDC1553_BC = 2, DDC1553_BM = 3 }
enum  DDC155_MessageType {
  RTMsg = 0, BC2RT = 1, RT2BC = 2, RT2RT = 3,
  BC2RT_ASYNC = 0x11, RT2BC_ASYNC = 0x12, BC_MCODE = 5, RT_MCODE = 6,
  RT_STATUS = 7
}
enum  RFPRO_MessageType {
  RFPRO_NONE = 0, RFPRO_PHYSICS_LEGACY = 1, RFPRO_PHYSICS_OUTPUT = 2, RFPRO_MOTION_PLATFORM = 3,
  RFPRO_MOTION_PLATFORM_LEGACY = 4, RFPRO_PROXIMITY_QUERY = 5, RFPRO_PROXIMITY_QUERY_LEGACY = 6, RFPRO_TRAFFIC_VEHICLE_CONFIG = 7,
  RFPRO_TRAFFIC_VEHICLE_STATE = 8, RFPRO_SPECIAL_ACTOR = 9, RFPRO_LIGHT = 10, RFPRO_SCENELIGHT = 11,
  RFPRO_FMODPARAMETER = 12, RFPRO_PHYSICS_INPUT = 13, RFPRO_PROXIMITY_QUERYRESULT = 14, RFPRO_PROXIMITY_QUERYRESULT_LEGACY = 15,
  RFPRO_OPPONENT_STATE = 16
}
enum  ANALOG_VoltRange {
  Volt_10V_x2 = 1, Volt_5V_x2 = 2, Volt_2_5V_x2 = 3, Volt_1_5V_x2 = 4,
  Volt_1_25V_x2 = 5, Volt_10V_x1 = 6, Volt_5V_x1 = 7, Volt_20V_x1 = 8,
  Volt_20V_x2 = 9, Volt_3V_x2 = 10, Volt_16V_x1 = 11, Volt_Neg2_5V_to_7_5V = 12
}
enum  RawUnit_Type { RawUnit_Count = 0, RawUnit_Volt = 1 }
enum  JoyStick_Ctrl { JoyStickAxis = 1, JoyStickButton = 2 }
enum  LogiWheel_Ctrl { WheelAxis = 1, WheelButton = 2, WheelGearShift = 3, WheelTorque = 4 }
enum  FANPOD_Ctrl { FANPODPrimary = 1, FANPODButton = 2, FANPODLED = 3, FANPODJSAxis = 4 }
enum  TaskClass {
  TASK_NOCLASS = 0, TASK_DATALOGGER = 1, TASK_PLAYBACKIN = 2, TASK_PLAYBACKOUT = 3,
  TASK_IO_INPUT = 4, TASK_IO_OUTPUT = 6, TASK_IO_ASYNC = 7, TASK_MODELEXEC = 8,
  TASK_SCRIPT = 9, TASK_INITSCRIPT = 10, TASK_SCHEDULER = 11
}
enum  MemDevice {
  MEMREGION_IPC = 1, MEMREGION_POSIX = 2, MEMREGION_VMIC5565 = 3, MEMREGION_SCRAMNET150 = 4,
  MEMREGION_SCRAMNET_GT = 5
}
enum  EB5100Record {
  EB5100_NORMALRECORD = 0, EB5100_TUM_FUNCTION = 1, EB5100_PDU_RECORD = 2, EB5100_INTERNAL_VAR = 3,
  EB5100_XCP_RECORD = 4
}
enum  UnitClass {
  UNIT_DITANCE = 1, UNIT_AREA = 2, UNIT_VOLUME = 3, UNIT_VOL_FLOW = 4,
  UNIT_MASS_FLOW = 5, UNIT_SPEED = 6, UNIT_ANG_SPEED = 7, UNIT_MASS = 8,
  UNIT_FORCE = 9, UNIT_TIME = 10, UNIT_ENERGY = 11, UNIT_POWER = 12,
  UNIT_PRESSURE = 13, UNIT_ANGLE = 14, UNIT_TEMPERATURE = 15, UNIT_CURRENT = 16,
  UNIT_VOLTAGE = 17, UNIT_ACCELERATION = 18, UNIT_RESISTANCE = 19, UNIT_INDUCTANCE = 20,
  UNIT_CAPACITANCE = 21, UNIT_TORQUE = 22
}
enum  TB4702_Ctrl {
  TB7402_CTRL_SOUND_SPEED = 1, TB7402_CTRL_VOLTAGE = 2, TB7402_CTRL_FREQ = 3, TB7402_CTRL_CYCLE = 4,
  TB7402_CTRL_ENABLE = 5, TB7402_CTRL_RESP0 = 6, TB7402_CTRL_RESP1 = 7, TB7402_CTRL_RESP2 = 8,
  TB7402_CTRL_RESP3 = 9, TB7402_CTRL_RESP4 = 10, TB7402_CTRL_RESP5 = 11
}
enum  ScriptStdIO_Flags { ScriptStdIO_inputReady = 1 }
enum  SourceProgramType {
  SOURCE_SCRIPT = 1, SOURCE_RTW = 2, SOURCE_USERPROGRAM = 3, SOURCE_SIMPACK = 4,
  SOURCE_FMU = 5, SOURCE_ADAMS = 6, SOURCE_CARMAKER = 7, SOURCE_PYTHON = 8
}
enum  SchedType {
  SCHED_DEFAULT, SCHED_NOCONFIGURE, SCHED_USERFBSDEF, SCHED_SOFTTIMER,
  SCHED_SPINNING, SCHED_SOFTRT, SCHED_SIMULATION, SCHED_5565INTR,
  SCHED_SCGTINTR
}
enum  ROSTYPE { ROS_SUBSCRIBER, ROS_PUBLISHER }

Functions

char * ccurRTDB_hardwareConfigToString (HardwareConfig *p)
char * ccurRTDB_euConversionToString (EUConversion *p)
int ccurRTDB_hardwareAddressToString (HardwareConfig *p, char *str)
int ccurRTDB_stringToPointType (const char *pointType)
const char * ccurRTDB_pointTypeToString (int pointType)
const char * ccurRTDB_ioDirectionToString (int ioDir)
int ccurRTDB_stringToIODirection (const char *ioDir)
const char * ccurRTDB_rosTypeToString (int ioDir)
int ccurRTDB_stringToROSType (const char *ioDir)
int ccurRTDB_stringToCVTType (const char *cvtType)
const char * ccurRTDB_cvtTypeToString (int cvtType)
int ccurRTDB_stringToRawType (const char *cvtType)
const char * ccurRTDB_rawTypeToString (int cvtType)
char * ccurRTDB_itemValueDefToString (char **str, ItemValueDef *value)
char * ccurRTDB_itemValueToString (char **str, int cvtType, ItemValue *value, char hex)
int ccurRTDB_stringToItemValue (const char *sValue, int type, ItemValue *value)
void ccurRTDB_freeItemValue (ItemValue *value, int cvtType)
char * ccurRTDB_dimensionsToString (char *s, int *dimensions)
void ccurRTDB_stringToDimensions (const char *s, int *dimensions)
void ccurRTDB_stringToOrder (const char *s, short *order)
char * ccurRTDB_orderToString (char *s, short *order)
const char * ccurIO_boardTypeToString (int type)
int ccurIO_stringToBoardType (const char *t)
const char * ccurIO_parityToString (int type)
const char * ccurIO_speedToString (int type)
int ccurIO_stringToParity (const char *t)
int ccurIO_stringToSerialType (const char *t)
const char * ccurIO_serialTypeToString (int type)
int ccurIO_stringToSpeed (const char *t)
int ccurIO_getBoardNumberOfChannels (int boardId, int boardNum, int *nChannels)
unsigned long long ccurIO_stringToMacAddress (const char *s)
unsigned int ccurIO_stringToIP (const char *s)
const char * ccurIO_macAddressToString (unsigned long long mac)
const char * ccurIO_ipToString (unsigned int ip)
int ccurIO_stringToAFDXPortType (const char *s)
int ccurIO_stringToAFDXTXType (const char *s)
const char * ccurIO_afdxPortTypeToString (int pt)
const char * ccurIO_afdxTXTypeToString (int pt)
int ccurIO_stringToAFDXNetConfig (const char *s)
const char * ccurIO_afdxNetConfigToString (int nc)
const char * ccurIO_afdxVLTypeToString (int pt)
int ccurIO_stringToAFDXVLType (const char *s)
const char * ccurIO_NAI79C3SF6ModeTypeToString (int nc)
int ccurIO_stringToNAI79C3SF6ModeType (const char *mode)
const char * ccurIO_NAI79C3SF6ModelTypeToString (int nc)
int ccurIO_stringToNAI79C3SF6ModelType (const char *model)
const char * ccurIO_NAI79C3E7CounterModeTypeToString (int nc)
const char * ccurIO_NAI79C3E7IndexModeTypeToString (int nc)
int ccurIO_NAI79C3SF6NumChannelsForModel (int m)
const char * ccurIO_resolverTypeToString (int nc)
const char * ccurIO_rvdtTypeToString (int nc)
int ccurIO_stringToResolverType (const char *s)
int ccurIO_stringToNAI79C3ModeType (const char *s)
int ccurIO_stringToNAI79C3ModelType (const char *s)
int ccurIO_stringToNAI79C3E7CounterModeType (const char *s)
int ccurIO_stringToNAI79C3E7IndexModeType (const char *s)
int ccurIO_stringToRVDTType (const char *s)
int ccurIO_stringToVoltRange (const char *s)
const char * ccurIO_analogVoltRangeToString (int volt)
const char * ccurIO_protocolToString (int proto)
int ccurIO_stringToProtocol (const char *proto)
int ccurRTDB_stringToUnitClass (const char *uclass)
int ccurIO_stringToAnalogRawUnit (const char *unit)
const char * ccurIO_analogRawUnitToString (int unit)
const char * ccurIO_joystickCtrlTypeToString (int pt)
unsigned char ccurIO_stringToJoyStickCtrlType (const char *s)
const char * ccurIO_logiwheelCtrlTypeToString (int pt)
unsigned char ccurIO_stringToLogiWheelCtrlType (const char *s)
const char * ccurIO_FANPODCtrlTypeToString (int pt)
unsigned char ccurIO_stringToFANPODCtrlType (const char *s)
int ccurIO_stringToTaskClass (const char *t)
const char * ccurIO_taskClassToString (int class_)
int ccurIO_stringToSchedulingPolicy (const char *t)
const char * ccurIO_schedulingPolicyToString (int policy_)
int ccurIO_stringToFlexRayType (const char *s)
const char * ccurIO_flexrayTypeToString (int pt)
const char * ccurIO_hardwareTypeToString (int type)
int ccurIO_stringToHardwareType (const char *t)
const char * ccurIO_1553ControllerToString (int t)
int ccurIO_stringTo1553Controller (const char *t)
const char * ccurIO_1553MessageToString (int t)
int ccurIO_stringTo1553Message (const char *t)
int ccurIO_getCalibrationData (const char *fileName, CalibrationEntry *calibrationEntries, int maxChannels)
const char * ccurIO_UEIDevTypeToString (int t)
int ccurIO_stringToUEIDevType (const char *t)
const char * ccurIO_boardIdToString (int type)
int ccurIO_stringToBoardId (const char *t)
char * ccurNet_URLDecode (const char *s, int *length)
char * ccurNet_URLEncode (const char *s, int length)
int ccurNet_matchIP (const char *ip, const char *regexp)
unsigned char * ccurRTDB_getStringAddress (ItemValue *value, int *len)
const char * ccurRTDB_SimWBErrorToString (int error)
int ccurIOUser_stringToBoardId (const char *t)
const char * ccurIOUser_boardIdToString (int type)
int ccurIOUser_stringToHardwareAddress (int boardId, const char *line, void *IOAddress)
int ccurIOUser_hardwareAddressToString (int boardId, const void *IOAddress, char *str)
int ccurIO_stringToNIAIType (const char *type)
const char * ccurIO_niAITypeToString (int type)
char * ccur_fgets (ccur_fgetsLine *buf, FILE *fp)
int ccur_trimLine (char *line)

Variables

StringVariableValue * pStringValues
int * pStringLength
unsigned char * pDefaultValueTable

Define Documentation

#define mkppRev2 ( name1,
name2   )     name1 ## name2
#define mkppRev ( name1,
name2   )     mkppRev2(name1,name2)
#define ppREV   mkppRev(pp,__LINE__)
#define REV_STRING ( string   )     static const char *cvsRev=string; const char **ppREV = &cvsRev
#define MAX_TAGLEN   512

Maximum length of an Item name in the RTDB

#define MAX_EUNITSLEN   12

Maximum length of an engineering unit descriptor.

#define MAX_DIMENSIONS   8

Maximum number of dimensions for MATLAB Array

#define MAX_STRUCTDEPTH   30

Maximum depth for nested structure items.

#define MAX_DESCRIPTIONLEN   256

Max length for the description of an item

#define MAX_SUITETESTS   50
#define MAX_STRINGVARIABLELEN   1024

Maximum length for a string variable in the RTDB.

#define MAX_IOBOARDNAME   64
#define MAX_AFDXMSGNAME   64

Maximum AFDX message name length .

#define MAX_FDXMSGNAME   64

Maximum FDX message name length .

#define MAX_FDXVARNAME   10

Maximum FDX variable name length .

#define MAX_CIGINAME   64

Maximum CIGI Entity name length .

#define MAX_CIGIOUTPACKETS   128

Maximum CIGI Output Packets .

#define MAX_RS232MSGNAME   64

Maximum RS232 message name length .

#define MAX_RTWPROGRAMS   30

Maximum number of RTW and user models per test.

#define MAX_RTWMULTIRATES   20

Maximum number of RTW and user models per test.

#define MAX_MAPPINGVARNAME   64

The maximum length of a message variable for flightgear program.

#define MAX_HOSTNAME   33

The maximum length of a IP host name.

#define MAX_INITCONDNAME   64
#define MAX_NUMBEROFCPUS   32
#define MAX_ENVFILENAME   64
#define MAX_SESSIONUSERPARM   256
#define MAX_FLEXRAYMSGNAME   64

Maximum FlexRay message name length .

#define MAX_FLEXRAYCLUSTERNAME   64

Maximum FLexRay clusteri name length .

#define MAX_IOMAPPINGS   16

Maximum number of I/O mappings for a single points. (Outputs only)

#define MAX_IORECORDNAME   256
#define MAX_USERHARDWAREADDRESSSPACE   512
#define USER_BOARDFIRSTID   1000
#define MAX_MEMREGIONNAME   64

Maximum memory region name length.

#define MAX_EUCONVERSIONNAME   128
#define MAX_EUCONVERSIONRECORDS   10000
#define MAX_WAVEFILENAME   128
#define MAX_1553MSGNAME   64

Maximum DDC1553 message name length .

#define MAX_1553BUFFERLEN   64
#define MAX_ARIONOBJNAME   64
#define MAX_RTADBMSGNAME   64
#define MAX_PARMSIZEVISIBLE   3500
#define MAX_PROJECTNAME   64
#define DEFAULT_PROJECTNAME   "<default>"
#define MAX_SPAREITEMS   120
#define MAX_GROUPNAME   16
#define MAX_STRUCTENTRIES   100
#define GUI_CLIENTISCC   400
#define GUI_CLIENTISHMI   401
#define GUI_CLIENTISBUILDER   0x200
#define GUI_CLIENTAPPMASK   0xff
#define MAX_ECATMASTER_BOARDS   4
#define MAX_ECATDEVICENAMELENGTH   32
#define MAX_ECATDOMAINNAME   32
#define MAX_ECATDOMAINS   20
#define MAX_ECATSLAVES   100
#define MAX_ECATSLAVE_BOARDS   4
#define MAX_PDODESCRIPTION   64
#define MAX_FORMNAME   64
#define MAX_TABLECANENTRIES   2048
#define MAX_TABLELINENTRIES   512
#define MAX_TABLESENTENTRIES   128
#define MAX_ARINCLABELENTRIES   (8*256*36)
#define MAX_VTD_PKGNAME   64
#define CARMAKER_EXECNAME   "CarMaker.linux64"
#define MAX_POINTSPERID   100
#define MAX_IO_SHUTDOWNTIME   10
#define MAX_RTDB_PROP_FILES   33
#define ccurMax ( a,
b   )     ((a) > (b) ? (a) :(b))
#define ccurMin ( a,
b   )     ((a) < (b) ? (a) :(b))
#define POINTGROUP_MASK   0xf
#define POINTDIRECTION_MASK   0xf0
#define POINT_MASK   (POINTGROUP_MASK | POINTDIRECTION_MASK)
#define POINTDIRECTIONRT_MASK   0xf000
#define RTDB_ISINPUT ( pType   )     ((pType & POINTDIRECTION_MASK) & SimWB_DIR_INPUT)
#define RTDB_ISOUTPUT ( pType   )     ((pType & POINTDIRECTION_MASK) & SimWB_DIR_OUTPUT)
#define RTDB_ISDIGITAL ( pType   )     ((pType & POINTGROUP_MASK) == SimWB_BOOLEAN )
#define RTDB_ISANALOG ( pType   )     ((pType & POINTGROUP_MASK) == SimWB_ANALOG )
#define RTDB_ISSTRING ( pType   )     ((pType & POINTGROUP_MASK) == SimWB_STRING )
#define RTDB_ISRTINPUT ( pType   )     (pType & SimWB_DIR_RTINPUT)
#define RTDB_ISRTOUTPUT ( pType   )     (pType & SimWB_DIR_RTOUTPUT)
#define MAX_DBNAME   64

Maximum name for a database.

#define MAX_DBDESCRIPTION   256

Maximum description length for a database.

#define MAX_SESSIONID   128

Maximum lenght of a test Id string.

#define MAX_TESTID   128

Maximum lenght of a session Id string.

#define MAX_RTDBLOAD   16
#define MAX_SIMWBBOARDS   32

Max number of board instances. This is for association with different loaded RTDB

#define CAN_CTRL_MAPPING   0
#define CAN_CTRL_PAUSERESUME   1
#define CAN_CTRL_TXNOW   2
#define CAN_CTRL_SCHEDFIFO   3
#define CAN_CTRL_TXONCHANGE   4
#define CAN_CTRL_SCHEDRATE   5
#define CAN_ASYNCIO_RUNSCHED   250
#define CAN_SCHEDRATE_MULT   (1000/CAN_ASYNCIO_RUNSCHED)
#define HDLC_RX_MAPPING   1
#define SENT_CTRL_FAST_CHANNEL   0
#define SENT_CTRL_SHORT_CHANNEL   1
#define SENT_CTRL_ENHANCED_CHANNEL   2
#define SENT_CTRL_STATUS_BIT0   3
#define SENT_CTRL_STATUS_BIT1   4
#define SENT_CTRL_PAUSE_RESUME   5
#define MAX_CPSENTSLOTS   10
#define EU_RAWTOPHYSICAL   0x80
#define EU_MAXTABLEENTRIES   50
#define EU_MAXPOLYNOMIAL   3
#define EU_LINEARCONVERSION   0x1
#define EU_1OVERXCONVERSION   0x2
#define EU_ERRORNOINVERSION   0x1
#define MAX_AI64SSCHANNELS   64
#define MAX_AI64LLCHANNELS   64
#define MAX_AD3224_DSCHANNELS   32
#define MAX_AD6418_CHANNELS   64
#define MAX_DA3218_CHANNELS   32
#define MAX_CPMFIOBOARDS   6
#define MAX_CPMFIOCHANNELS_IN   16
#define MAX_CPMFIOCHANNELS_OUT   16
#define MAX_CPMFIOBITS   96
#define MAX_LCAIOBOARDS   6
#define MAX_LCAIOCHANNELS_IN   32
#define MAX_LCAIOCHANNELS_OUT   4
#define MAX_LCAIOBITS   18
#define MAX_16AO12CHANNELS   16
#define MAX_16AO16BOARDS   10
#define MAX_16AO16WAVEBOARDS   5
#define MAX_DA3218WAVEBOARDS   5
#define MAX_PK50_295CHANNELS   10
#define MAX_PK50_110CHANNELS   64
#define MAX_PDAQAOCHANNELS   96
#define MAX_DIO96BITS   96
#define MAX_DIO96INBOARDS   4
#define MAX_DIO96OUTBOARDS   4
#define MAX_RFACTOR_PROXIMITYQUERIES   10
#define MAX_NAI76C2BITS   48
#define MAX_ADLINK7256_DOBITS   16
#define MAX_ADLINK7256_BOARDS   4
#define MAX_ADLINK7296_BITS   96
#define MAX_ADLINK7230_DIBITS   16
#define MAX_ADLINK7230_DOBITS   16
#define MAX_ARINC429CHANNELS   16
#define MAX_ARINC429LABELS   256
#define MAX_ARINC429BOARDS   4
#define MAX_BTILX429BOARDS   4
#define MAX_BTILX429CHANNELS   32
#define MAX_DD42992BOARDS   8
#define MAX_DD42992LABELS   256
#define MAX_DD42992CHANNELS   36
#define MAX_AFDXBOARDS   4
#define MAX_AFDXMESSAGELEN   8196
#define MAX_AFDXVIRTUALLINKS   50
#define MAX_MSGPERVL   50
#define MAX_AFDXMESSAGES   (MAX_AFDXBOARDS*MAX_AFDXVIRTUALLINKS*MAX_MSGPERVL)
#define MAX_AITAFDXBOARDS   3
#define MAX_NETMSGS   256
#define MAX_NETBOARDS   4
#define MAX_NETMSGNAME   64

Maximum NET message name length .

#define MAX_NETMESSAGELEN   262144
#define MAX_NETMESSAGES   (MAX_NETBOARDS*MAX_NETMSGS)
#define MAX_RTMAPSBOARDS   4
#define MAX_RTMAPSMESSAGELEN   262144
#define RTMAPS_MINRATE   1
#define MAX_UDPMSGS   100
#define MAX_UDPBOARDS   2
#define MAX_UDPMESSAGELEN   262144
#define MAX_UDPMESSAGES   (MAX_NETBOARDS*MAX_NETMSGS)
#define MAX_FDXGRPS   256
#define MAX_FDXBOARDS   4
#define MAX_FDXMESSAGELEN   16386
#define MAX_FDXMESSAGES   (MAX_FDXBOARDS*MAX_FDXGRPS)
#define MAX_NAI79C3SF6_CHANNELS   12
#define MAX_NAI79C3SF6_MODULES   3
#define MAX_NAI79C3SF6_CHANNELS_PER_MODULE   4
#define MAX_NAI79C3SF6_SF_MODULE_CHANNELS   4
#define MAX_NAI79C3SF6_6D_MODULE_CHANNELS   3
#define MAX_NAI79C3SF6_E7_MODULE_CHANNELS   4
#define NAI79C3SF6_MODULE_MODEL_6D   0x3644
#define NAI79C3SF6_MODULE_MODEL_SF   0x5346
#define NAI79C3SF6_MODULE_MODEL_Z0   0x5A30
#define NAI79C3SF6_MODULE_MODEL_E7   0x4537
#define NAI79C3SF6_SF_MAXRPS   190
#define MAX_RESOLVERCHANNELS   6
#define MAX_RESOLVERCHANNELS_INPUT   8
#define MAX_RESOLVERBOARDS   8
#define MAX_RVDTCHANNELS   12
#define MAX_RVDTCHANNELS_INPUT   8
#define MAX_RVDTBOARDS   2
#define MAX_RS232BOARDS   2
#define MAX_RS232MESSAGELEN   1024
#define MAX_RS232MESSAGES   32
#define MAX_RS232CHANNELS   16
#define MAX_CANNETS   4
#define MAX_CANBOARDS   12
#define MAX_CANIDS   100
#define MAX_CANMESSAGELEN   64
#define MAX_VIRTCANNETS   12
#define MAX_SOCKCANNETS   4
#define MAX_NVARXCANNETS   6
#define MAX_PEAKCANBOARDS   3
#define MAX_PEAKCANNETS   2
#define MAX_LINBOARDS   12
#define MAX_LINIDS   100
#define MAX_LINMESSAGELEN   8
#define MAX_MOXABOARDS   10
#define MAX_MOXACHANNELS   8
#define MAX_MGTXBOARDS   4
#define MAX_MGTXCHANNELS   4
#define MAX_SIOXBOARDS   2
#define MAX_SIOXCHANNELS   8
#define MAX_SIOHDLCBOARDS   2
#define MAX_SIOHDLCCHANNELS   4
#define MAX_RESOLVERCHANNELS   6
#define MAX_RESOLVERCHANNELS_INPUT   8
#define MAX_RESOLVERBOARDS   8
#define MAX_RVDTCHANNELS   12
#define MAX_RVDTCHANNELS_INPUT   8
#define MAX_RVDTBOARDS   2
#define MAX_JOYSTICKBUTTONS   12
#define MAX_JOYSTICKAXIS   8
#define MAX_LOGIWHEELBUTTONS   22
#define MAX_LOGIWHEELAXIS   6
#define MAX_FANPODPRIMARY   5
#define MAX_FANPODBUTTON   24
#define MAX_FANPODLED   (15*3)
#define MAX_FANPODJSAXIS   (1*2)
#define MAX_PEAKCANBOARDS   3
#define MAX_PEAKCANNETS   2
#define MAX_ROCKETPORTBOARDS   2
#define MAX_ROCKETPORTCHANNELS   32
#define MAX_FASTCOMMBOARDS   4
#define MAX_FASTCOMMCHANNELS   8
#define MAX_SERIALCHANNELS   16
#define MAX_SERIALBOARDS   8
#define MAX_FLEXRAYBOARDS   8
#define MAX_FLEXRAYMESSAGELEN   128
#define MAX_FLEXRAYMESSAGES   256
#define MAX_EB5100BOARDS   3
#define MAX_MEMORYREGIONS   25
#define MAX_1553CHANNELS   8
#define MAX_1553BOARDS   2
#define MAX_1553RTS   32
#define MAX_1553MAILBOXES   32
#define MAX_TMC12CHANNELS   6
#define MAX_ARIONBOARDS   1
#define MAX_ARIONOBJECTS   512
#define MAX_ARIONIDT   0xffffff
#define MIN_ARIONIDT   0x1000
#define MAX_ARIONSIZE   262132
#define MAX_RTADBBOARDS   1
#define MAX_VMIC4132_CHANNELS   32
#define MAX_VMIC3122_CHANNELS   64
#define MAX_PAS2581_CHANNELS   40
#define MAX_NAI64DL1_CHANNELS   16
#define MAX_VMIC2210_BITS   64
#define MAX_PAS9795_BITS   72
#define MAX_PAS9782_CHANNELS   8
#define MAX_ADVTECH1758_BITS   128
#define MAX_NIESERIESAICHANNELS   64
#define MAX_NIESERIESDIOBITS   8
#define MAX_NIESERIESAOCHANNELS   2
#define MAX_NIESERIESCOUNTERS   2
#define MAX_NI670XAOCHANNELS   16
#define MAX_NI670XDIOBITS   8
#define MAX_HITV370_CHANNELS   4
#define MAX_HITV370_BOARDS   4
#define MAX_PWM1012_CHANNELS   12
#define MAX_PWM1012_BOARDS   4
#define MAX_PWM1112_CHANNELS   12
#define MAX_PWM1112_BOARDS   4
#define MAX_OPTO32BITS_IN   24
#define MAX_OPTO32BITS_OUT   8
#define MAX_OPTO16X16BITS_IN   16
#define MAX_OPTO16X16BITS_OUT   16
#define MAX_SENSOWHEELS   2
#define MAX_CIGISESSIONS   4
#define MAX_CIGIPROPERTIES   20
#define MAX_VTDSESSIONS   4
#define MAX_VTD_PACKETS   100
#define MAX_CPSENT_CHANNELS   12
#define MAX_CPSENT_BOARDS   3
#define MAX_CPSENT_IDS   4
#define MAX_CPSENT_NIBBLES   6
#define MAX_SENTMESSAGELEN   6
#define MAX_CPWSSENSOR_CHANNELS   4
#define MAX_KNOCKSENSOR_CHANNELS   16
#define MAX_ACRO_AP231CHANNELS   16
#define MAX_ACRO_AP341CHANNELS   16
#define MAX_ACRO_AP441CHANNELS   32
#define MAX_ACRO_AP445CHANNELS   32
#define MAX_ACRO_AP408CHANNELS   32
#define MAX_ACRO_AP503CHANNELS   36
#define MAX_ACC_IIRO16CHANNELS   16
#define MAX_UEGOBOARDS   4
#define MAX_UEGOCHANNELS   4
#define MAX_UEGOCONTROLS   15
#define UEGO_DATA_TABLE   1
#define UEGO_DATA_POLY   2
#define UEGO_MAX_TABLEENTRIES   40
#define UEGO_MAX_POLYS   4
#define UEGO_SENSOR_NARROWBAND   1
#define UEGO_SENSOR_WIDEBAND   2
#define UEGO_CTRL_LAMBDA   0
#define UEGO_CTRL_HEATER   1
#define UEGO_CTRL_UN_FAULT_OPEN   3
#define UEGO_CTRL_UN_FAULT_GND   4
#define UEGO_CTRL_UN_FAULT_VBAT   5
#define UEGO_CTRL_VM_FAULT_OPEN   6
#define UEGO_CTRL_VM_FAULT_GND   7
#define UEGO_CTRL_VM_FAULT_VBAT   8
#define UEGO_CTRL_IP_FAULT_OPEN   9
#define UEGO_CTRL_IP_FAULT_GND   10
#define UEGO_CTRL_IP_FAULT_VBAT   11
#define UEGO_CTRL_IA_FAULT_OPEN   12
#define UEGO_CTRL_IA_FAULT_GND   13
#define UEGO_CTRL_IA_FAULT_VBAT   14
#define MAX_RESSIMBOARDS   4
#define MAX_RESSIMCHANNELS   16
#define MAX_RESSIMCONTROLS   6
#define RESSIM_CTRL_RESISTANCE   0
#define RESSIM_CTRL_FAULT_RA_GND   1
#define RESSIM_CTRL_FAULT_RA_VPLUS   2
#define RESSIM_CTRL_FAULT_RB_GND   3
#define RESSIM_CTRL_FAULT_RB_VPLUS   4
#define RESSIM_CTRL_FAULT_OPEN   5
#define FPGA_MAX_ADC_CHANNELS   16
#define FPGA_MAX_ANALOG_OUT   16
#define FPGA_MAX_ANALOG_IN   16
#define FPGA_MAX_DIGITAL   96
#define FPGA_DIGITAL_GROUPSIZE   4
#define ARRIAX_DC_MAX_ANALOG_OUT   12
#define ARRIAX_DC_MAX_ANALOG_IN   12
#define ARRIAX_MAX_DIGITAL   32
#define ARRIAX_DC_MAX_DIGITAL   32
#define ARRIAX_DC_DIGITAL_GROUPSIZE   4
#define FPGA_MAX_CYLINDERS   16
#define FPGA_MAX_PULSECAPTURE_CHANNELS   32
#define FPGA_MAX_CAMSHAFTS   4
#define FPGA_POINT_PER_PULSECAPTURE_CHANNEL   6
#define FPGA_POINT_PER_PMSM_ELECTRIC_MOTOR_CHANNEL   4
#define FPGA_MAX_PWMOUT   96
#define FPGA_MAX_PWMIN   96
#define FPGA_MAX_ANALOG_THRESHOLD   32
#define FPGA_MAX_TOOTHWHEEL   32
#define FPGA_MAX_ENCODERS   32
#define FPGA_MAX_DECODERS   32
#define FPGA_MAX_WAVEGEN_CHANNELS   32
#define FPGA_MAX_HPFP   32
#define FPGA_MAX_INVERTER   1
#define FPGA_MAX_UVW_ENCODERS   32
#define FPGA_MAX_PMSM_ELECTRIC_MOTOR   1
#define FPGA_MAX_FOC_X1   1
#define FPGA_MAX_KNOCK_SENSOR   8
#define FPGA_MAX_RESOLVER_TX   32
#define FPGA_MAX_LVDT_RVDT_TX   32
#define FPGA_MAX_SYNCHRO_TX   32
#define FPGA_MAX_RESOLVER_RX   32
#define FPGA_MAX_LVDT_RVDT_RX   32
#define FPGA_MAX_SYNCHRO_RX   32
#define FPGA_MAX_MULTIPLEXER   96
#define FPGA_MAX_MUXPERCH   96
#define FPGA_MAX_SENT_TX   32
#define FPGA_MAX_SENT_RX   32
#define FPGA_MAX_SIO_TX   4
#define FPGA_MAX_SIO_RX   4
#define FPGA_MAX_REGISTER_WRITE   128
#define FPGA_MAX_REGISTER_READ   128
#define FPGA_MAX_NPHASE_WAVEGEN_CHANNELS   32
#define FPGA_NPHASE_WAVEGEN_MAXPHASES   16
#define FPGA_MAX_WAVEGEN_RX_CHANNELS   32
#define FPGA_MAX_SPI_MASTER_CHANNELS   8
#define FPGA_MAX_SPI_MASTER_CS   6
#define FPGA_MAX_SPI_SLAVE_CHANNELS   8
#define FPGA_MAX_SPI_MASTER_CL   32
#define FPGA_MAX_CLOCKS   8
#define FPGA_MAX_WSS_CHANNELS   32
#define FPGA_MAX_WSS_MAGNETS   512
#define FPGA_MAX_CIC_CHANNELS   32
#define FPGA_MAX_IIR_CHANNELS   32
#define FPGA_MAX_RECORDER_CHANNELS   16
#define FPGA_POINT_PER_HPFP_CHANNEL   3
#define FPGA_POINT_PER_THRESHOLD_CHANNEL   2
#define FPGA_MAX_SENT_TX_NIBBLES   6
#define FPGA_MAX_SENT_TX_DATA   512
#define FPGA_MAX_SENT_RX_NIBBLES   6
#define FPGA_MAX_SENT_RX_DATA   512
#define FPGA_CTRL_CRANKSHAFT_RPM   1
#define FPGA_CTRL_ENGINE_ENABLE   2
#define FPGA_CTRL_CRANKSHAFT_ANGLE   3
#define FPGA_CTRL_CAMSHAFT_ADVANCE   5
#define FPGA_CTRL_IGNINJ_CH   10
#define FPGA_CTRL_ANAOUT   60
#define FPGA_CTRL_ANAIN   80
#define FPGA_CTRL_ANAIN_INPUT_VOLTAGE   81
#define FPGA_CTRL_ANAIN_THRESHOLD_OUTPUT   82
#define FPGA_CTRL_DIGITAL   100
#define FPGA_CTRL_PWMOUT_FREQ   40
#define FPGA_CTRL_PWMOUT_DUTYCYCLE   41
#define FPGA_CTRL_PWMOUT_ONESHOTCOUNT   42
#define FPGA_CTRL_PWMIN_FREQ   50
#define FPGA_CTRL_PWMIN_DUTYCYCLE   51
#define FPGA_CTRL_PWMIN_PULSECOUNT   52
#define FPGA_CTRL_DECODER_COUNTER   70
#define FPGA_CTRL_DECODER_ANGLE   71
#define FPGA_CTRL_DECODER_RPM   72
#define FPGA_CTRL_ENCODER_RPM   75
#define FPGA_CTRL_ENCODER_ANGLE   76
#define FPGA_CTRL_WAVEGEN_FREQ   78
#define FPGA_CTRL_HPFP_CH   73
#define FPGA_CTRL_TOOTHWHEELRPM   120
#define FPGA_CTRL_TOOTHWHEELANGLE   121
#define FPGA_CTRL_INVERTER_VOLTAGE   77
#define FPGA_CTRL_UVW_ENCODER_RPM   79
#define FPGA_CTRL_UVW_ENCODER_ANGLE   83
#define FPGA_CTRL_PMSM_ELECTRIC_MOTOR_TLOAD   84
#define FPGA_CTRL_FOC_X1_RPM   85
#define FPGA_CTRL_FOC_X1_FREQUENCY   86
#define FPGA_CTRL_KNOCK_SENSOR_DC_OFFSET   87
#define FPGA_CTRL_KNOCK_SENSOR_GAIN   88
#define FPGA_CTRL_KNOCK_SENSOR_CRANK_ANGLE   89
#define FPGA_CTRL_KNOCK_SENSOR_KNOCK_OUT   90
#define FPGA_CTRL_PMSM_ELECTRIC_MOTOR_INFO   91
#define FPGA_CTRL_RESOLVER_TX_FREQ   92
#define FPGA_CTRL_RESOLVER_TX_DATA   93
#define FPGA_CTRL_LVDT_RVDT_TX_FREQ   94
#define FPGA_CTRL_LVDT_RVDT_TX_DATA   95
#define FPGA_CTRL_SYNCHRO_TX_FREQ   96
#define FPGA_CTRL_SYNCHRO_TX_DATA   97
#define FPGA_CTRL_MUX_CONTROL   98
#define FPGA_CTRL_SENT_TX_STATE   101
#define FPGA_CTRL_SENT_TX_NIBBLE_NUMBER   102
#define FPGA_CTRL_SENT_TX_NIBBLES   103
#define FPGA_CTRL_SENT_TX_DATA   104
#define FPGA_CTRL_SENT_RX_ERROR_RATE   105
#define FPGA_CTRL_SENT_RX_NIBBLES   106
#define FPGA_CTRL_SENT_RX_DATA   107
#define FPGA_CTRL_SIO_TX_DATA   108
#define FPGA_CTRL_SIO_RX_DATA   109
#define FPGA_CTRL_SIO_TX_COUNT   110
#define FPGA_CTRL_SIO_RX_COUNT   111
#define FPGA_CTRL_REGISTER_WRITE_DATA   112
#define FPGA_CTRL_REGISTER_WRITE_PROG_DATA   113
#define FPGA_CTRL_REGISTER_READ_DATA   114
#define FPGA_CTRL_LVDT_RVDT_RX_ANGULAR_POSITION   126
#define FPGA_CTRL_LVDT_RVDT_RX_SPEED   127
#define FPGA_CTRL_LVDT_RVDT_RX_RPM   128
#define FPGA_CTRL_LVDT_RVDT_RX_DIRECTION   129
#define FPGA_CTRL_RESOLVER_RX_ANGULAR_POSITION   116
#define FPGA_CTRL_RESOLVER_RX_SPEED   117
#define FPGA_CTRL_RESOLVER_RX_RPM   118
#define FPGA_CTRL_RESOLVER_RX_DIRECTION   119
#define FPGA_CTRL_SYNCHRO_RX_ANGULAR_POSITION   122
#define FPGA_CTRL_SYNCHRO_RX_SPEED   123
#define FPGA_CTRL_SYNCHRO_RX_RPM   124
#define FPGA_CTRL_SYNCHRO_RX_DIRECTION   125
#define FPGA_CTRL_NPHASE_WAVEGEN_FREQ   130
#define FPGA_CTRL_NPHASE_WAVEGEN_PHASE   131
#define FPGA_CTRL_NPHASE_WAVEGEN_AMPLITUDE   132
#define FPGA_CTRL_WAVEGEN_RX_FREQ   134
#define FPGA_CTRL_WAVEGEN_RX_MAGNITUDE   133
#define FPGA_CTRL_WAVEGEN_RX_FREQ_TX   135
#define FPGA_CTRL_SPI_MASTER_CSSELECTION   136
#define FPGA_CTRL_SPI_MASTER_COMMANDCODE   137
#define FPGA_CTRL_SPI_MASTER_NUMITERATIONS   138
#define FPGA_CTRL_SPI_MASTER_FRAMESIZE   139
#define FPGA_CTRL_SPI_MASTER_RAMSTARTADDRESS   140
#define FPGA_CTRL_SPI_MASTER_GO   141
#define FPGA_CTRL_SPI_MASTER_INFINITE   142
#define FPGA_CTRL_SPI_MASTER_BREAK   143
#define FPGA_CTRL_SPI_MASTER_WAITING   144
#define FPGA_CTRL_SPI_MASTER_INVALID   145
#define FPGA_CTRL_SPI_MASTER_FIFOCOUNT   146
#define FPGA_CTRL_SPI_MASTER_WATERMARK   147
#define FPGA_CTRL_SPI_MASTER_EMPTY   148
#define FPGA_CTRL_SPI_MASTER_DATATX   149
#define FPGA_CTRL_SPI_MASTER_DATARX   150
#define FPGA_CTRL_SPI_MASTER_SKIPDATATX   151
#define FPGA_CTRL_SPI_MASTER_SKIPDATARX   152
#define FPGA_CTRL_SPI_SLAVE_SPIMODE   153
#define FPGA_CTRL_SPI_SLAVE_FIFOENABLE   154
#define FPGA_CTRL_SPI_SLAVE_FIFOMSB   155
#define FPGA_CTRL_SPI_SLAVE_ADDRESSINMSB   156
#define FPGA_CTRL_SPI_SLAVE_DATAINMSB   157
#define FPGA_CTRL_SPI_SLAVE_DATAOUTMSB   158
#define FPGA_CTRL_SPI_SLAVE_COMMANDSIZE   159
#define FPGA_CTRL_SPI_SLAVE_DATASIZE   160
#define FPGA_CTRL_SPI_SLAVE_DATAREAD   161
#define FPGA_CTRL_SPI_SLAVE_REGISTERCONTROL   164
#define FPGA_CTRL_SPI_SLAVE_ERRORCOUNT   165
#define FPGA_CTRL_SPI_SLAVE_FIFOCOUNT   166
#define FPGA_CTRL_SPI_SLAVE_VALIDPACKETCOUNT   167
#define FPGA_CTRL_SPI_SLAVE_BUFFERRESPONSE   168
#define FPGA_CTRL_SPI_SLAVE_SIGNATURERESPONSE   169
#define FPGA_CTRL_SPI_SLAVE_DATA   170
#define FPGA_CTRL_SPI_SLAVE_FIFODATA   171
#define FPGA_CTRL_SPI_SLAVE_PACKETTOTALRESET   172
#define FPGA_CTRL_SPI_SLAVE_ERRORCOUNTRESET   173
#define FPGA_CTRL_SPI_SLAVE_MEMORYRESET   174
#define FPGA_CTRL_SPI_SLAVE_SAMPLEEDGERESET   175
#define FPGA_CTRL_SPI_SLAVE_PORTFLAGS   176
#define FPGA_CTRL_SPI_MASTER_DELAY   177
#define FPGA_CTRL_SPI_MASTER_MEMORYRESET   178
#define FPGA_CTRL_SPI_MASTER_GOING   179
#define FPGA_CTRL_SPI_MASTER_STATE   180
#define FPGA_CTRL_SPI_MASTER_DCOMMANDCODE   181
#define FPGA_CTRL_SPI_MASTER_DCSSELECTION   182
#define FPGA_CTRL_SPI_MASTER_DFRAMESIZE   183
#define FPGA_CTRL_SPI_MASTER_DRAMSTARTADDRESS   184
#define FPGA_CTRL_SPI_MASTER_CURRENTINDEX   185
#define FPGA_CTRL_WSS_RPM   186
#define FPGA_CTRL_WSS_FCI   187
#define FPGA_CTRL_WSS_FM   188
#define FPGA_CTRL_WSS_AKDATA   189
#define FPGA_CTRL_WSS_DF11STRENGTH   190
#define FPGA_CTRL_SIO_TX_NUMPACKETS   191
#define FPGA_CTRL_SIO_TX_NUMWORDSINPACKET0   192
#define FPGA_CTRL_SIO_TX_NUMWORDSINPACKET1   193
#define FPGA_CTRL_SIO_TX_NUMWORDSINPACKET2   194
#define FPGA_CTRL_SIO_TX_FRAMECOUNT   195
#define FPGA_CTRL_SIO_TX_RCIMEDGECOUNT   196
#define FPGA_CTRL_SIO_RX_NUMWORDSPERPACKET   198
#define FPGA_CTRL_SIO_RX_CLEARCOUNT   202
#define FPGA_CTRL_LVDS   203
#define FPGA_CTRL_DC_DIGITAL   204
#define FPGA_CTRL_RECORDER_PAUSE   205
#define MAX_UNITDEFS   256
#define MAX_HRTB4702CHANNELS   (12+1)
#define NI_MAX_BOARDID   0x200
#define NI_CTR_CLEARVARAFTERTRIGGER   0x01
#define NI_CTR_DECRTOZERO   0x04
#define NI_CTR_NONCUMULATIVE   0x02
#define AFDX_MAXNAMELEN   128
#define RTMAPS_CTRL_MAPPING   0
#define RTMAPS_CTRL_PAUSERESUME   1
#define RTMAPS_CTRL_TXNOW   2
#define RTMAPS_CTRL_SCHEDFIFO   3
#define RTMAPS_CTRL_TXONCHANGE   4
#define RTMAPS_CTRL_SCHEDRATE   5
#define NET_CTRL_MAPPING   0
#define NET_CTRL_PAUSERESUME   1
#define NET_CTRL_TXNOW   2
#define NET_CTRL_SCHEDFIFO   3
#define NET_CTRL_TXONCHANGE   4
#define NET_CTRL_SCHEDRATE   5
#define FDX_CTRL_MAPPING   0
#define FDX_CTRL_PAUSERESUME   1
#define FDX_CTRL_TXNOW   2
#define FDX_CTRL_SCHEDFIFO   3
#define FDX_CTRL_TXONCHANGE   4
#define FDX_CTRL_SCHEDRATE   5
#define DDC1553_CTRL_MAPPING   0
#define DDC1553_CTRL_TXNOW   1
#define DDC1553_MODECODE_WORD   2
#define DDC1553_RT_MODECODE   3
#define DDC1553_RT_MODECODE_W   4
#define DDC1553_RT_STATUS_W   5
#define MAXCSCRIPT_INPUTSTRLEN   256
#define MAXCSCRIPT_OUTPUTSTRLEN   256
#define MAXCSCRIPT_OUTPUTSTRINGS   1024
#define SOURCE_ASYNC   0x80
#define SOURCE_PGMMASK   0x7f
#define DLOGGER_PAUSE   1

Data logger commands

#define DLOGGER_CIRCULARSTOP   2
#define DLOGGER_RESUME   4
#define DLOGGER_NEWITEM   8
#define CIRCLOGGER_NORMAL   0

Lock the circular logger file set.

#define CIRCLOGGER_TAKELOCK   1

Override lock if the lock is on for the current file set

#define CIRCLOGGER_NEXTFILE   2

Go to next file in sequence if the current one is locked.

#define IPC_REFRESH   7698
#define IPC_ASAM   7699
#define IPC_SYNCASYNC   7700
#define SIMWB_IPSSHM_START   7995
#define DLLOGGERBUF_IPC   (SIMWB_IPSSHM_START)
#define ASYNCIOQ_IPC   (SIMWB_IPSSHM_START +1)
#define RTDB_IPC   (SIMWB_IPSSHM_START +2)
#define __bswap_float ( x   ) 
Value:
(__extension__                               \
     ({ unsigned int   __x = (x);   \
      float __v;\
     __asm__ ("bswap %0" : "=r" (__v) : "0" (__x));   \
     __v; }))
#define __bswap_double ( x   ) 
Value:
(__extension__                                                           \
          ({ union { __extension__ double __d;                   \
             unsigned int __l[2]; } __w, __r;                             \
           {                                                                  \
             __w.__d = (x);                                                  \
             __r.__l[0] = __bswap_32 (__w.__l[1]);                            \
             __r.__l[1] = __bswap_32 (__w.__l[0]);                            \
           }                                                                  \
         __r.__d; }))
#define ATOMIC_INC ( counter   ) 
Value:
__asm__ __volatile__(\
            "lock ;"  "incl %0"\
            :"=m" (counter)\
            :"m" (counter));
#define ATOMIC_DEC ( counter   ) 
Value:
__asm__ __volatile__(\
           "lock ; "  "decl %0"\
           :"=m" (counter)\
           :"m" (counter));

Typedef Documentation

typedef unsigned char StringVariableValue[MAX_STRINGVARIABLELEN]
typedef union HardWareRecord HardwareRecord
typedef int(* UserHardwareAddressToString)(int boardId, const void *hardwareAddress, char *str)
typedef int(* UserStringToHardwareAddress)(int boardId, const char *str, void *hardwareAddress)

Enumeration Type Documentation

enum pointGroup
Enumerator:
SimWB_ANALOG 
SimWB_BOOLEAN 
SimWB_MBIT 
SimWB_STRING 
SimWB_PARAMETER 
SimWB_SHARED_PARAMETER 
SimWB_MDLSIGNAL 
enum pointDirection
Enumerator:
SimWB_DIR_INPUT 
SimWB_DIR_OUTPUT 
SimWB_DIR_INOUT 
enum pointDirectionRT
Enumerator:
SimWB_DIR_RTINPUT 
SimWB_DIR_RTOUTPUT 
enum UEI_DevType
Enumerator:
UEI_ANALOG 
UEI_DIGITAL 
UEI_MF101 
UEI_ARINC429 
UEI_CAN 
UEI_RELAY 
UEI_AFDX 
enum UEI_MF101_SUBSYTEM
Enumerator:
MF101_AI 
MF101_AO 
MF101_DI_FET 
MF101_DO_FET 
MF101_DI_TTL 
MF101_DO_TTL 
enum CaptureType
Enumerator:
CAPTURE_CSV 
CAPTURE_INITCOND 
CAPTURE_RTFORM 
CAPTURE_MAT 
enum SnapShotVars
Enumerator:
SNAPSHOT_PARAMETERS 
SNAPSHOT_SIGNALS 
SNAPSHOT_RTDBIn 
SNAPSHOT_RTDBOut 
enum CapType
Enumerator:
TYPE_CAPTURE 
TYPE_SNAPSHOT 
enum BoardID
Enumerator:
NotMapped 
AI64SS 
AO16 
DIO96_IN 
DIO96_OUT 
ARINC429 
AIM_AFDX 
RESOLVER_OUT 
RVDT_OUT 
RS232 
GPIB 
JOYSTICK 
FLIGHTGEAR 
XPLANE 
NETJOYSTICK 
CANIO_ESD405 
RESOLVER_IN 
RVDT_IN 
FLEXRAY 
IOIPA_T 
PDAQAO 
CANIO_PEAK 
EB5100 
MEM_DEVICE 
LCAIO 
AI64LL 
ADLINK_7256 
PK_50_295 
PAS2080_IN 
PAS2080_OUT 
AO16_W 
DDC1553_67 
PK_50_110 
TMC12 
MOXA_CPXX 
ARION 
VMIC_4132 
VMIC_3122 
VMIC_2210 
NAI_64DL1 
PAS_9782 
PAS_9795 
PAS_2581 
HIT_V370 
RTADB 
ECAT_MASTER 
ECAT_SLAVE 
FASTCOMM_SERIAL 
AI64SS_STREAM 
PWM_1012 
BTI_Lx429 
NETIO 
OPTO32 
PWM_1112 
LOGIWHEEL_G2X 
R_FACTOR 
SENSO_WHEEL 
AIT_AFDX 
UDP_PACKET 
AD3224_DS 
ADLINK_7230 
ADLINK_7296 
RTDBITEM_COPY 
NAI_76C2_K6 
DA3218 
R_FACTOR_TS 
ROCKET_PORT 
ELAB_ECAT_MASTER 
DD_429_92 
BABY_LIN 
CP_FISC 
ESD_ECAT_SLAVE 
OPTO16X16 
CIGI_IO 
CP_FPGA_ArV 
NAI_79C3_K6 
SIOX_SERIAL 
CP_SENT 
CP_COS64 
CP_MFIO 
DA3218_W 
NAI_79C3_SF6 
CP_WSSENSOR 
CP_KNOCKSENSOR 
DOLPHIN_IX 
CAN_IXXAT 
CP_UEGO 
FDX 
SIO_HDLC 
CP_RESSIM 
NAI_79C3_E7 
VTD 
CANIO_VIRT 
CANIO_SOCK 
HR_TB4702 
CANIO_NV_ARX 
RTMAPS 
AD6418 
XCP_SLAVE 
CANLIN_IXXAT_640 
FANPOD_DD2 
MICROGATE_GTX 
CP_CMFIO 
ROS2_MSGS 
ADVTECH_1758 
IADS_SRC 
UEI 
CP_FPGA_ArX 
ACRO_AP231 
ACRO_AP341 
ACRO_AP408 
ACRO_AP441_1 
ACRO_AP441_2 
ACRO_AP445 
ACRO_AP503 
ACC_IIRO16 
NI6601 

All NI boards should be >= 0x100, we use mask to have a common value for all of them .

NI6602 
NIDIO96 
NI6509 
NI6052 
NI6033 
NI6023 
NI6024 
NI6025 
NI6030 
NI6031 
NI6032 
NI6034 
NI6036 
NI6040 
NI6070 
NI6071 
NI6703 
NI6704 
NI6509_PCIE 
enum NIHardwareType
Enumerator:
HardwareAnalog 
HardwareDigital 
HardwareCounter 
enum NIAIType
Enumerator:
NI_RSE 
NI_NRSE 
NI_DIFF 
enum NICounterType
Enumerator:
NICounter_Frequency 
NICounter_Ticks 
NICounter_Time 
NICounter_CountPulse 
NICounter_PulseWidth 
NICounter_FrequencyMeasure 
NICounter_2EdgesSeparation 
NICounter_MotionEncoder_X1 
NICounter_MotionEncoder_X2 
NICounter_MotionEncoder_X4 
NICounter_MotionEncoder_2PulseCounting 
NICounter_SinglePulse 
NICounter_PulseTrain 
NICounter_SinglePeriod 
NICounter_PositionSensing 
enum NIEncoderPhase
Enumerator:
NICounter_EncoderAHBH 
NICounter_EncoderAHBL 
NICounter_EncoderALBH 
NICounter_EncoderALBL 
enum Logical_Operator
Enumerator:
LOGOP_GT 
LOGOP_GE 
LOGOP_LT 
LOGOP_LE 
LOGOP_EQ 
LOGOP_NE 
LOGOP_NOT 
enum RtadbDimemsion
Enumerator:
RTADB_DIM_SCALAR 
RTADB_DIM_VECTOR 
RTADB_DIM_MATRIX 
enum RtadbNature
Enumerator:
RTADB_NAT_LOGICAL 
RTADB_NAT_PHYSICAL 
enum RtadbType
Enumerator:
RTADB_TYP_BOOLEAN 
RTADB_TYP_DOUBLE 
RTADB_TYP_FLOAT 
RTADB_TYP_INT 
RTADB_TYP_SHORT 
enum ProtocolType
Enumerator:
Protocol_UDP 
Protocol_TCP 
enum AFDX_NetConfig
Enumerator:
AFDX_VL_NETA 
AFDX_VL_NETB 
AFDX_VL_NETBoth 
AFDX_VL_NETDelayA 
AFDX_VL_NETDelayB 
AFDX_VL_NETVL 
enum AFDX_PortType
Enumerator:
AFDX_PortSAP 
AFDX_PortUDP 
enum AFDX_TXType
Enumerator:
AFDX_TXQueue 
AFDX_TXSample 
enum AFDX_VLType
Enumerator:
AFDX_VL_TX 
AFDX_VL_RX 
enum FlexRay_Type
Enumerator:
FLEXRAY_TX 
FLEXRAY_RX 
enum RS232_Type
Enumerator:
RS232_TX 
RS232_RX 
enum Buffer_Type
Enumerator:
BUFFER_TX 
BUFFER_RX 
enum NAI79C3_Mode_Type
Enumerator:
NAI79C3_Resolver 
NAI79C3_Synchro 
enum NAI79C3_E7_CounterMode_Type
Enumerator:
NAI79C3_E7_QUAD_1X 
NAI79C3_E7_QUAD_2X 
NAI79C3_E7_QUAD_4X 
enum NAI79C3_E7_IndexMode_Type
Enumerator:
NAI79C3_E7_INDEXMODE_OFF 
NAI79C3_E7_INDEXMODE_LOAD_ON_I 
NAI79C3_E7_INDEXMODE_LATCH_ON_I 
NAI79C3_E7_INDEXMODE_GATE_ON_I 
NAI79C3_E7_INDEXMODE_RESET_ON_I 
enum NAI79C3_Model_Type
Enumerator:
MODEL_Z0 
MODEL_SF 
MODEL_6D 
MODEL_W2 
MODEL_E7 
enum Resolver_Type
Enumerator:
RESOLVER_ROTSPEED 
RESOLVER_POSANGLE 
enum RVDT_Type
Enumerator:
RVDT_2WIRE 
RVDT_4WIRE 
enum DDC1553_CtrlType
Enumerator:
DDC1553_RT 
DDC1553_BC 
DDC1553_BM 
enum DDC155_MessageType
Enumerator:
RTMsg 
BC2RT 
RT2BC 
RT2RT 
BC2RT_ASYNC 
RT2BC_ASYNC 
BC_MCODE 
RT_MCODE 
RT_STATUS 
enum RFPRO_MessageType
Enumerator:
RFPRO_NONE 
RFPRO_PHYSICS_LEGACY 
RFPRO_PHYSICS_OUTPUT 
RFPRO_MOTION_PLATFORM 
RFPRO_MOTION_PLATFORM_LEGACY 
RFPRO_PROXIMITY_QUERY 
RFPRO_PROXIMITY_QUERY_LEGACY 
RFPRO_TRAFFIC_VEHICLE_CONFIG 
RFPRO_TRAFFIC_VEHICLE_STATE 
RFPRO_SPECIAL_ACTOR 
RFPRO_LIGHT 
RFPRO_SCENELIGHT 
RFPRO_FMODPARAMETER 
RFPRO_PHYSICS_INPUT 
RFPRO_PROXIMITY_QUERYRESULT 
RFPRO_PROXIMITY_QUERYRESULT_LEGACY 
RFPRO_OPPONENT_STATE 
enum ANALOG_VoltRange
Enumerator:
Volt_10V_x2 

+-10 Volt range.

Volt_5V_x2 

+-5 Volt range.

Volt_2_5V_x2 

+-2.5 Volt range.

Volt_1_5V_x2 

+-1.5 Volt range.

Volt_1_25V_x2 

+-1.25 Volt range.

Volt_10V_x1 

0 to 10 V unipolar

Volt_5V_x1 

0 to 5V unipolar

Volt_20V_x1 

0 to 20V unipolar

Volt_20V_x2 

+- 20V unipolar

Volt_3V_x2 
Volt_16V_x1 
Volt_Neg2_5V_to_7_5V 
enum RawUnit_Type
Enumerator:
RawUnit_Count 

Raw value is in channel count. This is the default.

RawUnit_Volt 

Raw value is stored in volt.

enum JoyStick_Ctrl
Enumerator:
JoyStickAxis 
JoyStickButton 
enum LogiWheel_Ctrl
Enumerator:
WheelAxis 
WheelButton 
WheelGearShift 
WheelTorque 
enum FANPOD_Ctrl
Enumerator:
FANPODPrimary 
FANPODButton 
FANPODLED 
FANPODJSAxis 
enum TaskClass
Enumerator:
TASK_NOCLASS 
TASK_DATALOGGER 
TASK_PLAYBACKIN 
TASK_PLAYBACKOUT 
TASK_IO_INPUT 
TASK_IO_OUTPUT 
TASK_IO_ASYNC 
TASK_MODELEXEC 
TASK_SCRIPT 
TASK_INITSCRIPT 
TASK_SCHEDULER 
enum MemDevice
Enumerator:
MEMREGION_IPC 
MEMREGION_POSIX 
MEMREGION_VMIC5565 
MEMREGION_SCRAMNET150 
MEMREGION_SCRAMNET_GT 
enum EB5100Record
Enumerator:
EB5100_NORMALRECORD 
EB5100_TUM_FUNCTION 
EB5100_PDU_RECORD 
EB5100_INTERNAL_VAR 
EB5100_XCP_RECORD 
enum UnitClass
Enumerator:
UNIT_DITANCE 
UNIT_AREA 
UNIT_VOLUME 
UNIT_VOL_FLOW 
UNIT_MASS_FLOW 
UNIT_SPEED 
UNIT_ANG_SPEED 
UNIT_MASS 
UNIT_FORCE 
UNIT_TIME 
UNIT_ENERGY 
UNIT_POWER 
UNIT_PRESSURE 
UNIT_ANGLE 
UNIT_TEMPERATURE 
UNIT_CURRENT 
UNIT_VOLTAGE 
UNIT_ACCELERATION 
UNIT_RESISTANCE 
UNIT_INDUCTANCE 
UNIT_CAPACITANCE 
UNIT_TORQUE 
enum TB4702_Ctrl
Enumerator:
TB7402_CTRL_SOUND_SPEED 
TB7402_CTRL_VOLTAGE 
TB7402_CTRL_FREQ 
TB7402_CTRL_CYCLE 
TB7402_CTRL_ENABLE 
TB7402_CTRL_RESP0 
TB7402_CTRL_RESP1 
TB7402_CTRL_RESP2 
TB7402_CTRL_RESP3 
TB7402_CTRL_RESP4 
TB7402_CTRL_RESP5 
enum ScriptStdIO_Flags

Bit usage for the ScriptStdIO flags.

Enumerator:
ScriptStdIO_inputReady 
enum SourceProgramType

The type of source program we can store in the CCURSIM and we can associate with a test.

Enumerator:
SOURCE_SCRIPT 

User defined script.

SOURCE_RTW 

A RTW MATLAB model.

SOURCE_USERPROGRAM 

A User program .

SOURCE_SIMPACK 

A SIMPACK model .

SOURCE_FMU 

A FMU model .

SOURCE_ADAMS 

A Adams model .

SOURCE_CARMAKER 

A CarMaker model .

SOURCE_PYTHON 

A Python model .

enum SchedType
Enumerator:
SCHED_DEFAULT 
SCHED_NOCONFIGURE 
SCHED_USERFBSDEF 
SCHED_SOFTTIMER 
SCHED_SPINNING 
SCHED_SOFTRT 
SCHED_SIMULATION 
SCHED_5565INTR 
SCHED_SCGTINTR 
enum ROSTYPE
Enumerator:
ROS_SUBSCRIBER 
ROS_PUBLISHER 

Function Documentation

char* ccurRTDB_hardwareConfigToString ( HardwareConfig *  p  ) 
char* ccurRTDB_euConversionToString ( EUConversion *  p  ) 
int ccurRTDB_hardwareAddressToString ( HardwareConfig *  p,
char *  str 
)
int ccurRTDB_stringToPointType ( const char *  pointType  ) 
const char* ccurRTDB_pointTypeToString ( int  pointType  ) 
const char* ccurRTDB_ioDirectionToString ( int  ioDir  ) 
int ccurRTDB_stringToIODirection ( const char *  ioDir  ) 
const char* ccurRTDB_rosTypeToString ( int  ioDir  ) 
int ccurRTDB_stringToROSType ( const char *  ioDir  ) 
int ccurRTDB_stringToCVTType ( const char *  cvtType  ) 
const char* ccurRTDB_cvtTypeToString ( int  cvtType  ) 
int ccurRTDB_stringToRawType ( const char *  cvtType  ) 
const char* ccurRTDB_rawTypeToString ( int  cvtType  ) 
char* ccurRTDB_itemValueDefToString ( char **  str,
ItemValueDef *  value 
)
char* ccurRTDB_itemValueToString ( char **  str,
int  cvtType,
ItemValue *  value,
char  hex 
)
int ccurRTDB_stringToItemValue ( const char *  sValue,
int  type,
ItemValue *  value 
)
void ccurRTDB_freeItemValue ( ItemValue *  value,
int  cvtType 
)
char* ccurRTDB_dimensionsToString ( char *  s,
int *  dimensions 
)
void ccurRTDB_stringToDimensions ( const char *  s,
int *  dimensions 
)
void ccurRTDB_stringToOrder ( const char *  s,
short *  order 
)
char* ccurRTDB_orderToString ( char *  s,
short *  order 
)
const char* ccurIO_boardTypeToString ( int  type  ) 
int ccurIO_stringToBoardType ( const char *  t  ) 
const char* ccurIO_parityToString ( int  type  ) 
const char* ccurIO_speedToString ( int  type  ) 
int ccurIO_stringToParity ( const char *  t  ) 
int ccurIO_stringToSerialType ( const char *  t  ) 
const char* ccurIO_serialTypeToString ( int  type  ) 
int ccurIO_stringToSpeed ( const char *  t  ) 
int ccurIO_getBoardNumberOfChannels ( int  boardId,
int  boardNum,
int *  nChannels 
)
unsigned long long ccurIO_stringToMacAddress ( const char *  s  ) 
unsigned int ccurIO_stringToIP ( const char *  s  ) 
const char* ccurIO_macAddressToString ( unsigned long long  mac  ) 
const char* ccurIO_ipToString ( unsigned int  ip  ) 
int ccurIO_stringToAFDXPortType ( const char *  s  ) 
int ccurIO_stringToAFDXTXType ( const char *  s  ) 
const char* ccurIO_afdxPortTypeToString ( int  pt  ) 
const char* ccurIO_afdxTXTypeToString ( int  pt  ) 
int ccurIO_stringToAFDXNetConfig ( const char *  s  ) 
const char* ccurIO_afdxNetConfigToString ( int  nc  ) 
const char* ccurIO_afdxVLTypeToString ( int  pt  ) 
int ccurIO_stringToAFDXVLType ( const char *  s  ) 
const char* ccurIO_NAI79C3SF6ModeTypeToString ( int  nc  ) 
int ccurIO_stringToNAI79C3SF6ModeType ( const char *  mode  ) 
const char* ccurIO_NAI79C3SF6ModelTypeToString ( int  nc  ) 
int ccurIO_stringToNAI79C3SF6ModelType ( const char *  model  ) 
const char* ccurIO_NAI79C3E7CounterModeTypeToString ( int  nc  ) 
const char* ccurIO_NAI79C3E7IndexModeTypeToString ( int  nc  ) 
int ccurIO_NAI79C3SF6NumChannelsForModel ( int  m  ) 
const char* ccurIO_resolverTypeToString ( int  nc  ) 
const char* ccurIO_rvdtTypeToString ( int  nc  ) 
int ccurIO_stringToResolverType ( const char *  s  ) 
int ccurIO_stringToNAI79C3ModeType ( const char *  s  ) 
int ccurIO_stringToNAI79C3ModelType ( const char *  s  ) 
int ccurIO_stringToNAI79C3E7CounterModeType ( const char *  s  ) 
int ccurIO_stringToNAI79C3E7IndexModeType ( const char *  s  ) 
int ccurIO_stringToRVDTType ( const char *  s  ) 
int ccurIO_stringToVoltRange ( const char *  s  ) 
const char* ccurIO_analogVoltRangeToString ( int  volt  ) 
const char* ccurIO_protocolToString ( int  proto  ) 
int ccurIO_stringToProtocol ( const char *  proto  ) 
int ccurRTDB_stringToUnitClass ( const char *  uclass  ) 
int ccurIO_stringToAnalogRawUnit ( const char *  unit  ) 
const char* ccurIO_analogRawUnitToString ( int  unit  ) 
const char* ccurIO_joystickCtrlTypeToString ( int  pt  ) 
unsigned char ccurIO_stringToJoyStickCtrlType ( const char *  s  ) 
const char* ccurIO_logiwheelCtrlTypeToString ( int  pt  ) 
unsigned char ccurIO_stringToLogiWheelCtrlType ( const char *  s  ) 
const char* ccurIO_FANPODCtrlTypeToString ( int  pt  ) 
unsigned char ccurIO_stringToFANPODCtrlType ( const char *  s  ) 
int ccurIO_stringToTaskClass ( const char *  t  ) 
const char* ccurIO_taskClassToString ( int  class_  ) 
int ccurIO_stringToSchedulingPolicy ( const char *  t  ) 
const char* ccurIO_schedulingPolicyToString ( int  policy_  ) 
int ccurIO_stringToFlexRayType ( const char *  s  ) 
const char* ccurIO_flexrayTypeToString ( int  pt  ) 
const char* ccurIO_hardwareTypeToString ( int  type  ) 
int ccurIO_stringToHardwareType ( const char *  t  ) 
const char* ccurIO_1553ControllerToString ( int  t  ) 
int ccurIO_stringTo1553Controller ( const char *  t  ) 
const char* ccurIO_1553MessageToString ( int  t  ) 
int ccurIO_stringTo1553Message ( const char *  t  ) 
int ccurIO_getCalibrationData ( const char *  fileName,
CalibrationEntry *  calibrationEntries,
int  maxChannels 
)
const char* ccurIO_UEIDevTypeToString ( int  t  ) 
int ccurIO_stringToUEIDevType ( const char *  t  ) 
const char* ccurIO_boardIdToString ( int  type  ) 
int ccurIO_stringToBoardId ( const char *  t  ) 
char* ccurNet_URLDecode ( const char *  s,
int *  length 
)
char* ccurNet_URLEncode ( const char *  s,
int  length 
)
int ccurNet_matchIP ( const char *  ip,
const char *  regexp 
)
unsigned char* ccurRTDB_getStringAddress ( ItemValue *  value,
int *  len 
)
const char* ccurRTDB_SimWBErrorToString ( int  error  ) 
int ccurIOUser_stringToBoardId ( const char *  t  ) 
const char* ccurIOUser_boardIdToString ( int  type  ) 
int ccurIOUser_stringToHardwareAddress ( int  boardId,
const char *  line,
void *  IOAddress 
)
int ccurIOUser_hardwareAddressToString ( int  boardId,
const void *  IOAddress,
char *  str 
)
int ccurIO_stringToNIAIType ( const char *  type  ) 
const char* ccurIO_niAITypeToString ( int  type  ) 
char* ccur_fgets ( ccur_fgetsLine *  buf,
FILE *  fp 
)
int ccur_trimLine ( char *  line  ) 

Variable Documentation

StringVariableValue* pStringValues
int* pStringLength
unsigned char* pDefaultValueTable