ARINC429

 

Labeled messages are sent or received over each channel. I/O points are mapped to bit fields within these messages.

Reference Information

I/O Card Model Number

CS-DD-42916I3-300.

I/O Driver Model Number

WCS-DD-42916I3.

I/O Module License:

ICS-SWB-1211.

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Buttons

 

Expand All

Expands the hierarchy tree showing board configuration.

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Collapse All

Collapses the hierarchy tree showing the board configuration to show only the channel nodes.

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New Label

Adds a new message label for the selected channel.

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New Field

Adds a field to the selected label.

Delete

Deletes the selected node and everything, including mappings, below it. The top level nodes cannot be deleted.

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Channels

 

Direction

Selects the I/O direction of the channel. The ARINC 429 channels are uni directional, so a direction for the channel must be specified. This setting is not persistent on the real time host if no points are mapped to the channel.

  • Input
  • Output

Parity

Selects the parity of the channel.

  • None
  • Odd
  • Even

Speed

Selects the speed of the channel.

  • High : 100 kbits/s.
  • Low : 10 kbits/s.
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Labels

 

Label

Unique identifier for a message on this channel. Usually specified as an octal number. To enter the label value as an octal number, prefix the number with 0 . To enter as an hexadecimal value, prefix the number with 0x

Sched Rate (ms)

Rate at which messages are sent (output channels only).

FIFO Tx:

Specifies that messages are sent via FIFO instead of scheduled rate (output channels only).

Tx on change

Specifies that message are sent when a value changes (FIFO Tx only).

TxOrder

The priority to send this label when multiple labels are output on the same channel (FIFO Tx only)

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Mapping

 

Bit (offset:size)

Bit offset and size of the field. Only integer bit fields are supported. Single-bit fields are mapped to digital points. Multi-bit fields are mapped to analog points.
To be consistent with the bit numbering while mapping different devices, the bit counting/numbering always starts at 0 (Most Significant Bit) and increases to the Least Significant Bit. So for instance, in a 32 bit work the MSB is always 0 and the LSB is 31. This will in some case not match device specific bit numbering. And the user might have to convert from the device specific bit counting to the SimWB bit counting.
To make the conversion from SimWB bit counting to ARINC 429 easier, the mapping dialog shows the bit layout in the ARINC word. For each bit field created, the bits specified are also highlighted in green.

BCD Format

Specifies that bits 3 through 22 are interpreted as a BCD value.

BCD SSM Bits:

Specifies that bits 1 through 2 are interpreted as an integer value.

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Mapping Table

Mapped Point(s) Column

I/O point(s) a field is mapped to.

To map a point to a field, select a field on the left side of the I/O Mappings form, then click on a check box for an I/O point on the right side of the form. See I/O Mappings... for details.

Synchronous I/O Task: arinc429out

The process computes all ARINC 32-bit output words corresponding to ARINC 429 output items and places them into the ARINC output FIFO. ARINC words that are unchanged since the last test cycle will not be queued.

The FIFO is read by the arinc429asyncio asynchronous task that writes them to the hardware board.

Asynchronous I/O Task: arinc429asyncio

This process runs asynchronous to the simulation loop and handles both inputs from and outputs to the ARINC 429 boards. Due to the fact that a ARINC board can only be opened by one task at a time and a single board can be configured to do inputs and outputs simultaneously, this process is multithreaded.

There is a separate thread for each board that is configured as input (that is, at least one channel on the board is configured for input and at least one RTDB variable is mapped to that channel.) The input thread configures the board to notify itself of any new inputs received via a software interrupt. The thread sleeps until the interrupt wakes it. It then reads the interrupted channel immediately and queues an update request into the asyncio FIFO queue. In this mode, the input thread does not poll the board to detect new inputs.

There is a single thread to handle the outputs for all the boards that are configured as output (that is, at least one channel on any board is configured for output and at least one RTDB variable is mapped to that channel.) The output thread polls the ARINC output FIFO at a regular interval. The default interval is every 5 milliseconds and can be specified as a command line argument with –t msec in the options column of the I/O Tasks form.

DDC ARINC429 Connector