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Demo program for Synchro Tx IP Core.
The Usage() function shows how to execute the test program, options available and default values set for different configuration variables. The Variables section specifies variables used in the test program, what they specify, the values it holds and can take. The main() function specifies sequence of api calls executed and tested.
Functions | |
| void | SynchroTxUsage () |
| int | main (int argc, char *argv[]) |
Variables | |
| double | starting_angle =0 |
| Internal Excitation Starting angle of the Synchro Tx IP Core Channel rotation. It takes values 0 - rotation in degrees and defaults to 0 degree. | |
| int | rotation =360 |
| Rotation of the Internal Excitation input of the Synchro Tx IP Core Channel. It takes values 360/720 degrees and defaults to 360 degree. | |
| uint | enable =1 |
| enable mode bit for the Synchro Tx IP Core Channel. Toggling the enable signal will cause the registers to revert to default power-on states. It takes values 0 or 1 and defaults to 1 | |
| uint | activate =0 |
| output enable for the Synchro Tx IP Core Channel. Enable this after configuring the registers associated with api calls starting with C. It takes values 0 or 1 and defaults to 0 | |
| double | frequency =0 |
| Internal Excitation Frequency of the Synchro Tx IP Core in Hertz. | |
| uint | data_register_mode =0 |
| Data Register Mode takes values 0 or 1(0-signal input from port, 1-signal input from register) and defaults to 0. | |
| uint | excitation_mode =0 |
| Excitation Mode takes values 0 or 1 (0= internally generated excitation, 1= externally generated excitation applied through the input port) and it defaults to 0. | |
| uint | negate_output =0 |
| Negate output negates the four output ports a, b, c and excitation out. This is accomplised by using a four bit parameter whereby LSB bit negates a, second bit negates b, third bit negates c and MSB negates excitation out. It defaults to 0. | |
| fpgawb_ipcore_t | ip_core |
| fpgawb_ipcore_t struct which stores useful information about the IP Core after executing get IP Info api call. Check fpgawb_lib.h or api call documentation for more information | |
| int | channel =-1 |
| Channel number for the Synchro Tx IP Core Channel. It takes values 0 to (number of IP Core channels-1) and defaults to -1 (test program executed for all channels) | |
| uint | config_mode =0 |
| Configuration mode for the test program. Indicates to run the program in configure/setup IP mode or configure frequency/data on the fly mode. It takes values 0-Static configuration/1-Change Freq or data on the fly. It defaults to 0. | |
| fpgawb_ipcore_synchro_tx_configure_t | config |
| fpgawb_ipcore_synchro_tx_configure_t struct passed as argument for setting the static parameters if the Synchro Tx IP Core channel. Check fpgawb_lib.h or api call documentation for more information | |
| double | data =0 |
| Data is the theta input to be written to the data register and takes value 0 to 360 in degrees. The data register mode should be set to 1 using the Configuration api call prior. | |
| uint | phase_delay = 0 |
| phase_delay is delay for a, b and c in 100ns increments up to max of 50. | |
| double | gain = 0.9999 |
| Gain is the amount to scale the output relative to the input. It takes value 0 to 31. | |
| int main | ( | int | argc, |
| char * | argv[] | ||
| ) |
Step 1: OPEN DEVICE
ccurPMFC_Open(&handle,board_no,oflags)
Before using any API calls, the user needs to open the device and get a handle. This handle is then used as the first argument in most of the following APIs.
Step 2: GET DRIVER INFO
ccurPMFC_Get_Driver_Info(handle, &binfo)
This call returns useful driver information and saves in the ccurpmfc_driver_info_t structure for later use.
Step 3: GET LIBRARY INFO
ccurPMFC_Get_Library_Info(handle, &linfo)
This call returns useful library information and saves in the ccurpmfc_library_info_t structure for later use.
Step 4: GET IP INFO
fpgawb_Synchro_Tx_Get_Ip_Info(handle, &ip_core)
This call returns useful IP Core information and saves in the fpgawb_ipcore_t structure for later use.
Step 5: ACTIVATE Synchro TX CHANNEL
fpgawb_Synchro_Tx_Activate_Ch(handle,chan,enable,activate)
This call activates the Synchro Tx IP Core Channel. Note to set activate to 0 because we will be using the Config api calls which requires activate be 0. The default for activate is 0 in this test program. It is set to 1 at the end. Please be careful to give in the value as 0 when running the test program.
Step 6: CONFIGURE CHANNEL
C_fpgawb_Synchro_Tx_Configure_Ch(handle,chan,&config)
This call configures the static parameters like data_register_mode, excitation_mode, starting_angle, rotation, negate_output, phase_delay and gain for Synchro Tx IP Core Channel.
Step 7: ACTIVATE Synchro TX CHANNEL
fpgawb_Synchro_Tx_Activate_Ch(handle,chan,1,1)
This call activates the Synchro Tx channel for Running after the configuration phase. Note that you set the activate to 0 before configuration so make it 1 now.
Step 8: WRITE SYNCHRO TX CHANNEL DATA
fpgawb_Synchro_Tx_Write_Ch_Data(handle,chan,data)
This call writes input theta data to the data register of the Synchro Tx IP Core Channel, if the Data register mode is set to 1 via the configure api call.
Step 9: SET CHANNEL PHASE INCREMENT
fpgawb_Synchro_Tx_Set_Ch_Frequency(handle,chan,frequency)
This call sets Internal Excitation Frequency in Hz for the Synchro Tx IP Core Channel.
Step 9: CLOSE DEVICE
ccurPMFC_Close(handle)
Closes the device with the handle.
| void SynchroTxUsage | ( | ) |
Usage:
./fpgawb_ipcore_synchro_tx [-A Activate] [-b BoardNumber] [-c channelNumber] [-C config_mode] [-d DataRegisterMode] [-D Data] [-e Enable] [-E ExcitationMode] [-f Frequency] [-g Gain] [-n NegateOutput] [-p phaseDelay] [-s StartAngle] [-r Rotation]
| Options | Default value |
|---|---|
| -A Activate (0/1) | 0 |
| -b Board Number | 0 |
| -c channel Number (0-(Numchans-1) | -1 (all channels) |
| -C Config Mode (0-Static Configuration/ 1-Dynamic Configuration) | 0 |
| -d Data Register Mode (0-Signal I/P from port, 1-Signal I/P from register) | 0 |
| -D Data (0 to 360 in degrees) | 0 |
| -e Enable (0/1) | 1 |
| -E Excitation Mode (0=internally generated excitation, 1=externally generated excitation applied through the input port) | 0 |
| -f Internal Excitation Frequency in Hz | 0 |
| -g Gain | 0.9999 |
| -n Negate Output negates the four output ports a, b, c and excitation. This is accomplised by using a four bit parameter whereby LSB bit negates a, second bit negates b, third bit negates c and MSB negates excitation out | 0 |
| -p Phase Delay is delay for a, b and c in 100ns increments up to max of 50 | 0 |
| -r Rotation (360 or 720 degrees) | 360 |
| -s Internal Excitation Starting Angle (0 degrees - <rotation> degrees) | 0 |
Examples:
./fpgawb_ipcore_synchro_tx
./fpgawb_ipcore_synchro_tx -E1 -n3
./fpgawb_ipcore_synchro_tx -C1 -f1000
./fpgawb_ipcore_synchro_tx -C1 -D35