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Demo program for SIO IP Core.
The Usage() function shows how to execute the test program, options available and default values set for different configuration variables. The Variables section specifies variables used in the test program, what they specify, the values it holds and can take. The main() function specifies sequence of api calls executed and tested.
Functions | |
| void | SIOTxUsage () |
| int | main (int argc, char *argv[]) |
| void * | transmitReceiveDataFun (void *vargp) |
Variables | |
| double | oversampling_ratio =4 |
| Oversampling ratio for the SIO Tx IP Core. This parameter along with the IP clock is used to generate the data clock output signal. It takes value 0 to 31. Recommended oversampling_ratio value for Standard SIO is 16 and Fast SIO Is 4. | |
| uint | npause_cycles =256 |
| This is the number of pause pulses between packets. It takes value 0 to 1023. | |
| uint | ntx_bits =4 |
| This is the number of bits in a word for the SIO Tx IP Core. It takes value 4, 8, 16 or 32 and defaults to 4. | |
| uint | ntx_packets =1 |
| This is the number of packets that are loaded into the RAM. It takes value 1 to 3 and defaults to 1. | |
| uint | msb_swap =0 |
| msb_swap is used for controlling if the data is writted LSB or MSB first. It takes value 0 or 1. If 1, first bit received in the data stream from the serial interface will be the LSB of the word in the RAM. If 1, first bit received in the data stream from the serial interface will be the MSB of the word in the RAM | |
| fpgawb_ipcore_t | ip_core |
| fpgawb_ipcore_t struct which stores useful information about the SIO Tx IP Core after executing get IP Info api call. Check fpgawb_lib.h or api call documentation for more information | |
| int | channel =-1 |
| Channel number for the SIO Tx IP Core Channel. It takes values 0 to (number of IP Core channels-1) and defaults to -1 (test program executed for all channels) | |
| fpgawb_ipcore_sio_tx_configure_t | config |
| fpgawb_ipcore_sio_tx_configure_t struct passed as argument for setting the static parameters such as number of pause cycles, number of bits in a word, number of packets etc of the SIO Tx IP Core channel. Check fpgawb_lib.h or api call documentation for more information | |
| fpgawb_ipcore_sio_tx_clock_ctrl_configure_t | clock_config |
| fpgawb_ipcore_sio_tx_clock_ctrl_configure_t struct passed as argument for programming the clock control registers parameters of the SIO Tx IP Core channel. Check fpgawb_lib.h or api call documentation for more information | |
| fpgawb_ipcore_sio_tx_data_t | data [FPGAWB_MAX_IPCORE_CHANNELS] |
| fpgawb_ipcore_sio_tx_data_t struct passed as argument for programming the RAM data of the SIO Tx IP Core. Check fpgawb_lib.h or api call documentation for more information | |
| fpgawb_ipcore_sio_tx_transfer_length_t | config_length |
| fpgawb_ipcore_sio_transfer_length_t struct passed as argument for configuring the transfer length in bytes for the respective SIO Tx IP Core channel. Check fpgawb_lib.h or api call documentation for more information | |
| uint | tx_period = 1500 |
| Simulator parameter for the test program to execute transmitter api calls after specified microseconds. | |
| uint | srced_invert = 0 |
| It is a one-hot invert for the Sync, RCIM, C, E and D lines. It takes value 0 to 31. This is accomplished by using a five bit parameter whereby LSB when set to 1 negates D, second bit when set to 1 negates E, third bit when set to 1 negates C, fourth bit when set to 1 negates RCIM and MSB when set to 1 negates Sync. | |
| uint | sync_width = 8 |
| Parameter to specify the width of SYNCn pulse. It takes values in units of clock cycles. The min value is 8. | |
| uint | sync_start = 8 |
| Parameter to offset the SYNCn from the RCIM's rising edge. It takes values in units of clock cycles. The min value is 8. | |
| uint | rcim_pulses = 0 |
| Number of RCIM pulses to be expected between every transmission of the data. It takes value 0 to 15 corresponding to 1 to 16 RCIM pulses. | |
| uint | tx_mode = 1 |
| Mode of transmission. It takes value 0-RCIM, 1-Immediate transfer. | |
| uint | delay = 20 |
| Parameter to offset the enable from the RCIM's rising edge. It takes value greater than Sync Start + Sync Width + 4 with a min of 20 in units of clock cycles. | |
| uint | nframes_syncn = 0 |
| nframes_syncn is the number of frames between SYNCn pulses | |
| uint | sio_mode = 0 |
| sio_mode indicates Fast SIO or Standard SIO. It takes value 0 for Fast SIO and 1 for Standard SIO | |
| int main | ( | int | argc, |
| char * | argv[] | ||
| ) |
Step 1: OPEN DEVICE
ccurPMFC_Open(&handle,board_no,oflags)
Before using any API calls, the user needs to open the device and get a handle. This handle is then used as the first argument in most of the following APIs.
Step 2: GET DRIVER INFO
ccurPMFC_Get_Driver_Info(handle, &binfo)
This call returns useful driver information and saves in the ccurpmfc_driver_info_t structure for later use.
Step 3: GET LIBRARY INFO
ccurPMFC_Get_Library_Info(handle, &linfo)
This call returns useful library information and saves in the ccurpmfc_library_info_t structure for later use.
Step 4: GET IP INFO
fpgawb_SIO_Tx_Get_Ip_Info(handle, &ip_core)
This call returns useful IP Core information and saves in the fpgawb_ipcore_t structure for later use.
Step 5: CLEAR CLOCK CONTROL REGISTERS CHANNEL
fpgawb_SIO_Tx_Configure_Ch_Clock_Control(handle,chan,&clock_config)
This api calls programs the clock control registers to clear all the counters for the SIO Tx channel.
Step 6: SETUP SIO TX CHANNEL
fpgawb_SIO_Tx_Configure_Ch(handle,chan,&config)
This api call programs the static registers such as tx mode, word size etc for the SIO Tx channel.
Step 7: CONFIGURE OVERSAMPLING RATION FOR SIO TX CHANNEL
fpgawb_SIO_Tx_Set_Ch_Oversampling_Ratio(handle,chan,oversampling_ratio)
This api calls programs the oversampling ratio for the SIO Tx channel.
Step 8: ENABLE CLOCK CONTROL REGISTERS CHANNEL
fpgawb_SIO_Tx_Configure_Ch_Clock_Control(handle,chan,&clock_config)
This api calls programs the clock control registers to enable all the counters for the SIO Tx channel.
Step 9: SEIZE MSGDMA
ccurPMFC_MsgDma_Seize(handle)
Seizes the MsgDma for data transfer
Step 10: MSGDMA INITIALIZE
fpgawb_IpCore_MsgDma_Initialize_Plus(handle,&IpCodeSelect)
This call initializes Modular Scatter-Gather DMA for the selected IP Cores specified using the _fpgawb_ipcode_select_t struct. The api call calculates and allocates physical memory for the DMA transfer and configures the DMA Descriptors.
Step 14: RELEASE MSGDMA
ccurPMFC_MsgDma_Release(handle)
This call releases the seized MsgDma. Release the MsgDma once done with the transfer
Step 15: CLOSE DEVICE
ccurPMFC_Close(handle)
Closes the device with the handle.
| void SIOTxUsage | ( | ) |
Usage:
./fpgawb_ipcore_sio_tx [-b BoardNumber] [-c channelNumber] [-d EnableDelay] [-f RamDataFile] [-m MSBSwap/Endian] [-M SIOMode] [-n NumOfPackets] [-nrcim_pulses NumRCIMPulses] [-nframes_syncn] [-nwords_packet] [-o OversamplingRatio] [-p NumPausePulses] [-sync_start] [-synch_width] [-t NumOfBits] [-tx_mode] [-tx_inv_srced] [-tx_period]
| Options | Default value |
|---|---|
| -b Board Number | 0 |
| -c channel Number (0-(Numchans-1) | -1 (all channels) |
| -d Enable Delay (clock cycles) | 0 |
| -f Ram data file | null |
| -m Endian/MSB Swap (0 = LSB First / 1 = MSB First) | 0 |
| -M SIO Mode (0 = Fast / 1 = Standard) | 0 |
| -n Num of packets (0 to 3) | 1 |
| -nrcim_pulses (0-15 indicating 1-16 RCIM pulses per frame) | 0 |
| -nframes_syncn (Number of frames between SYNCn) | 0 |
| -nwords_packet (Comma separated list indicating number of words per packet) | 0 |
| -o Oversampling ratio (0 to 31) | 4 |
| -p Num of pause cycles (0 to 1023) | 256 |
| -sync_start (clock cycles) | 10 |
| -sync_width (clock cycles) | 10 |
| -t Num of bits in a word (4/8/16/32) | 4 |
-tx_mode (0-RCIM|1-Immediate) | 1 -tx_inv_srced (0 to 31) | 0 -tx_period us | 2000
Examples:
./fpgawb_ipcore_sio_tx -f angles/data_b4_384words.dat -nwords_packet 128,128,128 -n 3 -t 4
| void* transmitReceiveDataFun | ( | void * | vargp | ) |
Step 11: WRITE DATA FOR ALL SIO TX CHANNEL
fpgawb_SIO_Tx_Write_Ch_Data(handle,channel,data))
This api call writes the data to the physical memory allocated for MsgDma trasfer.
Step 12: CONFIGURE MSGDMA TRANSFER LENGTH FOR SIO TX Channels
fpgawb_IpCore_SIO_Tx_MsgDma_Config(handle,&IpCodeSelect,&config_length)
This api call conifigures the transfer length in bytes for the MsgDma descriptors.
Step 13: MSGDMA FIRE
fpgawb_IpCore_MsgDma_Fire(handle)
This call commences the MsgDma transfer.