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Demo program for SPI Master IP Core.
The Usage() function shows how to execute the test program, options available and default values set for different configuration variables. The Variables section specifies variables used in the test program, what they specify, the values it holds and can take. The main() function specifies sequence of api calls executed and tested.
Functions | |
| void | SPIUsage () |
| int | main (int argc, char *argv[]) |
Variables | |
| uint | enable =1 |
| enable mode bit for the SPI Master IP Core Channel. Toggling the enable signal will cause the registers to revert to default power-on states. It takes values 0 or 1 and defaults to 1 | |
| uint | activate =0 |
| output enable for the SPI Master IP Core Channel. Enable this after configuring the registers associated with api calls starting with C. It takes values 0 or 1 and defaults to 0 | |
| fpgawb_ipcore_t | ip_core |
| fpgawb_ipcore_t struct which stores useful information about the IP Core after executing get IP Info api call. Check fpgawb_lib.h or api call documentation for more information | |
| int | channel =-1 |
| Channel number for the SPI Master IP Core Channel. It takes values 0 to (number of IP Core channels-1) and defaults to -1 (test program executed for all channels) | |
| uint | config_mode =0 |
| Configuration mode for the test program. Indicates to run the program in static mode or dynamic mode. It takes values 0-Configuration/1-Dynamic. It defaults to 0. | |
| fpgawb_ipcore_spi_config_t | config |
| fpgawb_ipcore_spi_config_t struct passed as argument for setting the initialization parameters for the SPI Master IP Core channel. Check fpgawb_lib.h or api call documentation for more information | |
| fpgawb_ipcore_spi_cs_params_t | cs_params |
| fpgawb_ipcore_spi_cs_params_t struct passed as argument for setting the CS parameters for the SPI Master IP Core channel. Check fpgawb_lib.h or api call documentation for more information | |
| uint | frame_delay = 0 |
| frame_delay is the amount of IP Clock cycles in 10ns delayed between each frame of packets. It takes a 32 bit integer value and defaults to 0. | |
| uint | watermark = 1504 |
| watermark signifies the threshold value that will trigger the watermark flag if the FIFO reaches that many used words. It takes integer value upto 1504 and defaults to 1504. This test program is designed to read data from the FIFO when data is available in the FIFO and does not wait for the watermark flag to be triggered. | |
| int main | ( | int | argc, |
| char * | argv[] | ||
| ) |
Step 1: OPEN DEVICE
ccrtNGFC_Open(&handle,board_no,oflags)
Before using any API calls, the user needs to open the device and get a handle. This handle is then used as the first argument in most of the following APIs.
Step 2: GET DRIVER INFO
ccrtNGFC_Get_Driver_Info(handle, &binfo)
This call returns useful driver information and saves in the ccrtngfc_driver_info_t structure for later use.
Step 3: GET LIBRARY INFO
ccrtNGFC_Get_Library_Info(handle, &linfo)
This call returns useful library information and saves in the ccrtngfc_library_info_t structure for later use.
Step 4: GET IP INFO
fpgawb_SPI_Get_Ip_Info(handle, &ip_core)
This call returns useful IP Core information and saves in the fpgawb_ipcore_t structure for later use.
Step 5: ACTIVATE SPI CHANNEL
fpgawb_SPI_Activate_Ch(handle,chan,enable,activate)
This call activates the SPI Master IP Core Channel by setting board_enable to 1. Note to set activate to 0 because we will be using the Config api calls which requires activate be 0. The default for activate is 0 in this test program. It is set to 1 at the end. Please be careful to give in the value as 0 when running the test program.
Step 6: CONFIGURE/SETUP CHANNEL
fpgawb_SPI_Configure_Ch(handle,chan,&config)
This call configures/setup the initialization parameters for the SPI Master IP core channel.
Step 7: CONFIGURE CS PARAMS FOR CHANNEL
fpgawb_SPI_Configure_Ch_CS_Parameters(handle,chan,&cs_params)
This call configures the CS params such as packet_size, sck_frequency. packet_delay, rx_msb and tx_msb for the SPI Master IP core channel.
Step 8: ACTIVATE SPI CHANNEL
fpgawb_SPI_Activate_Ch(handle,chan,1,1)
This call activates the SPI Master IP core channel for Running after the configuration phase. Note that you put the activate to 0 before configuration so make it 1 now.
Step 9: SEIZE MSGDMA
ccrtNGFC_MsgDma_Seize(handle)
Seizes the MsgDma for data transfer.
Step 10: MSGDMA INITIALIZE
fpgawb_IpCore_MsgDma_Initialize_Plus(handle,&IpCodeSelect)
This call initializes Modular Scatter-Gather DMA for the selected IP Cores specified using the _fpgawb_ipcode_select_t struct. The api call calculates and allocates physical memory for the DMA transfer and configures the DMA Descriptors.
Step 12: CONFIGURES MSGDMA DESCRIPTOR LENGTH
fpgawb_SPI_MsgDma_Config(handle,&IpCodeSelect,&config_length)
This configures the MsgDma descriptor length for the SPI Master IP core channel. Please refer to api call documentaion for more information on configuring the parameters.
Step 13: WRITES DATA FOR TRANSMISSION
fpgawb_SPI_Write_Ch_Data(handle,channel,spi_data_tx)
This call writes the data to be transmitted to the physical memory/buffer for the SPI Master IP core channel. Data is written to the RAM on iterative mode or register on SKIP mode when MsgDma is fired.
Step 14: MSGDMA FIRE
fpgawb_IpCore_MsgDma_Fire(handle)
This call commences the MsgDma transfer which transfers the data to be transmitted by the SPI Master IP core from the physical memory/buffer to the RAM on the fpga.
Step 16: READS STATUS INFORMATION FOR THE CHANNEL
fpgawb_SPI_Get_Ch_Info(handle,chan,&spi_info[chan])
This call reads the controller status for the SPI IP core channel. It contains the FIFO status information.
Step 18: CONFIGURES MSGDMA DESCRIPTOR LENGTH
fpgawb_SPI_MsgDma_Config(handle,&IpCodeSelect,&config_length)
This configures the MsgDma descriptor length for the SPI Master IP core channel. Please refer to api call documentaion for more information on configuring the parameters.
Step 19: MSGDMA FIRE
fpgawb_IpCore_MsgDma_Fire(handle)
This call commences the MsgDma transfer from the fpga to physical memory, which contains the data received by the SPI Master IP core channel.
Step 20: READS RECEIVED DATA
fpgawb_SPI_Read_Ch_Data(handle,channel,spi_data_rx)
This call reads the data received for the SPI Master IP core channel.
Step 21: RELEASE MSGDMA
ccrtNGFC_MsgDma_Release(handle)
This call releases the seized MsgDma. Release the MsgDma once done with the transfer
Step 22: CLOSE DEVICE
ccrtNGFC_Close(handle)
Closes the device with the handle.
| void SPIUsage | ( | ) |
Usage:
./fpgawb_ipcore_spi [-A Activate] [-b BoardNumber] [-c channelNumber] [-d FrameDelay] [-C config_mode] [-e Enable] [-f InputFile] [-w WaterMark]
| Options | Default value |
|---|---|
| -A Activate (0/1) | 0 |
| -b Board Number | 0 |
| -c channel Number (0-(Numchans-1) | -1 (all channels) |
| -C Config Mode (0-static params/1-dynamic params) | 0 |
| -d Frame Delay (IP Clk cycles/10ns) | 0 |
| -e Enable (0/1) | 1 |
| -w Watermark (<=1504) | 1504 |
Examples:
SETUP: ./fpgawb_ipcore_spi -C0 -fangles/spi_cs_params.txt -w1504
RUNTIME: ./fpgawb_ipcore_spi -C1 -fangles/spi_ram_data.txt
Received data is written to spi_skip_output_file.txt or spi_iterative_output_file.txt respectively. Output format: SPI Ch : CS Num : Data
spi_cs_params.txt file format:
Comma separated file where each line contains the parameters for every CS line as below
packet_size in bits,SCK_frequency in hertz,packet_delay in SCK cycles,mode,rx_msb,tx_msb
spi_ram_data.txt file format:
Comma separated file where each line contains the data to be written to RAM to the respective CS